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fix(p4): use pre-v3 instruction variants on older P4 chip revisions#294

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sun-xiangyu merged 1 commit intoespressif:masterfrom
vikramdattu:fix/p4_pre_v3_asm_compat
Apr 17, 2026
Merged

fix(p4): use pre-v3 instruction variants on older P4 chip revisions#294
sun-xiangyu merged 1 commit intoespressif:masterfrom
vikramdattu:fix/p4_pre_v3_asm_compat

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@vikramdattu
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Summary

  • The esp.vsld.8 ... trunc operand and the changed esp.vldbc.{8,16}.ip immediate encoding are only available on ESP32-P4 v3.0+ (ECO5+)
  • The existing preprocessor guard only checks IDF version (>= 5.5.2) but not the chip revision, causing assembly errors when building for pre-v3 P4 chips on IDF 5.5.x
  • Added || defined(CONFIG_ESP32P4_SELECTS_REV_LESS_V3) to both guards in dl_esp32p4_color_common.S
  • Bumped version to 3.3.1

Error without fix

dl_esp32p4_color_common.S:79: Error: illegal operands `esp.vsld.8 q2,q0,q4,trunc'

Test plan

  • Build with CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y (pre-v3 chip) — uses old instruction variants
  • Build with v3+ chip (default) — uses trunc variant as before

The `esp.vsld.8 ... trunc` operand and the changed `esp.vldbc.{8,16}.ip`
immediate encoding are only available on ESP32-P4 v3.0+ (ECO5+). The
existing guard only checks the IDF version (>= 5.5.2) but not the target
chip revision, causing assembly errors when building for pre-v3 P4 chips
on IDF 5.5.x.

Add `|| defined(CONFIG_ESP32P4_SELECTS_REV_LESS_V3)` to the preprocessor
guards so the old instruction variants are used when the minimum supported
chip revision is set below v3.

Bump version to 3.3.1.
@sun-xiangyu
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@vikramdattu, thanks for your feedback.
@100312dog , please help review and merge this PR.

@100312dog
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@sun-xiangyu LGTM

@sun-xiangyu sun-xiangyu merged commit 380adf4 into espressif:master Apr 17, 2026
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3 participants