This is a personal project which purpose is to learn computer architecture by implementing the Hack Computer.
Hardware for the Cambridge Physical Computation Laboratory's Warp Embedded Multi-Sensor Platform.
emulate spi transaction/transfer over gpio lines
Vivado 2025.2 block design for VD100 (XCVE2302) — CIPS, NoC, AIE-ML, AXI interrupt controller, MyLEDIP. Reusable hardware platform for Vitis AIE kernel projects. Exports XSA for vd100_platform. No VCK190 required.
Board-aware ESP-IDF project generator for ESP32 — create new projects with the right pins, features, and templates.
Post-link Vitis pipeline platform for VD100 (XCVE2302). Add new HLS or AIE kernels to the existing Vitis region without starting a new Vivado project. Built from vd100_ma_system_project post-link XSA.
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