feat: virtual riscv-iommu support

[liulog]

Overview

This PR adds preliminary RISC-V vIOMMU support for guest zones. The current implementation focuses on basic register emulation, 1-level DDT handling, and command queue forwarding, allowing guests to interact with a virtualized RISC-V IOMMU interface while the hypervisor maintains control over the physical IOMMU state.

Supported Features

• Basic vIOMMU MMIO register emulation
• 1-level Device Directory Table virtualization
• Command Queue support

Not Supported Yet

• IOMMU interrupt handling
• Advanced DDT modes
  • Only 1-level DDT mode is currently supported.
  • 2-level and 3-level DDT modes are not implemented for guest.
• Full command set support
  • Some command types and function variants are ignored or reported as unsupported.
• MSI remapping through the virtual IOMMU
  • MSI page table ownership is retained by the hypervisor.

Test

Notes

This implementation is an initial vIOMMU foundation for RISC-V. It provides the minimum register, DDT, and command queue paths needed for early guest interaction, while leaving fault reporting, interrupt delivery, and full feature coverage for future work.