ABOUT THE PROJECT
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This project aims at implementing the VGA interface on Altera's DE0 
development board. This is utilized by a custom Qsys component that
accesses the SDRAM via the Avalon Bus. The frame buffer is stored
inside the SDRAM and via a softcore processor like the NIOS II and the
included graphics driver, the vga_controller component can be 
configured and started.

Supported graphic modes are:
	* 640x480@60Hz & 12-bit color


DIRECTORY STRUCTURE
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	doc		Doxygen-generated documentation
	hw		Quartus hardware designs
	sw		Driver and applications software


OVERVIEW HARDWARE PROJECTS
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ip/vga_controller	The custom vga_controller IP-component.
de0_vga_qsys		A Qsys-based system including the vga_controller
					component together with a NIOS II /s


OVERVIEW SOFTWARE PROJECTS
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de0_vga_driver		A basic graphics driver for the vga_controller