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feat: MSI-X interrupt-driven GPU wake + zero-spin SUBMIT_3D #263

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Merged
ryanbreen merged 3 commits into from
Mar 13, 2026
Merged

feat: MSI-X interrupt-driven GPU wake + zero-spin SUBMIT_3D #263

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820086b
feat: MSI-X interrupt-driven GPU wake + zero-spin SUBMIT_3D + frame p…
ryanbreen Mar 13, 2026
e8e411d
fix: pass z-order from BWM to kernel for correct GPU compositing order
ryanbreen Mar 13, 2026
421fc0f
fix: correct CPU tick accounting for blocked threads + BWM optimizations
ryanbreen Mar 13, 2026
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4 changes: 4 additions & 0 deletions kernel/src/drivers/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -122,6 +122,10 @@ pub fn init() -> usize {
serial_println!("[drivers] VirGL 3D acceleration active");
crate::graphics::set_compositor_backend(crate::graphics::CompositorBackend::VirGL);
serial_println!("[drivers] Compositor backend: VirGL");
// Enable yielding during GPU command waits now that init is complete.
// During runtime, GPU poll loops yield to the scheduler instead of
// spinning, letting other tasks run during ~3.4ms GPU processing.
virtio::gpu_pci::enable_gpu_yield();
}
Err(e) => serial_println!("[drivers] VirGL init skipped: {}", e),
}
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