Skip to content

feat: VMware SMP, network perf, btop improvements#259

Merged
ryanbreen merged 2 commits intomainfrom
feat/vmware-smp
Mar 11, 2026
Merged

feat: VMware SMP, network perf, btop improvements#259
ryanbreen merged 2 commits intomainfrom
feat/vmware-smp

Conversation

@ryanbreen
Copy link
Owner

Summary

  • VMware SMP boot fixes: Relocatable secondary CPU entry for VMware (RAM at 0x80000000 vs link address 0x40080000). Clear PAN bit and set SPAN in SCTLR_EL1 — VMware defaults PAN=1 causing permission faults. Secondary CPUs now initialize SCTLR_EL1 to match primary.
  • Network performance: Google DNS first (8.8.8.8 universally reachable from all hypervisors), 500ms timeout instead of 5s, performance tracing on DNS/HTTP phases. ARM64 network poll increased from 20Hz to 100Hz.
  • btop/procfs: Use global_ticks for accurate CPU% computation, filter terminated processes from display.
  • sys_fcntl: Single mutable borrow instead of drop-and-reacquire, proper EAGAIN on lock contention.

Test plan

  • VMware Fusion ARM64 boot with SMP (secondary CPUs initialize correctly)
  • Parallels ARM64 boot (no regression)
  • HTTP fetch test timing improved (DNS < 1s, total < 5s)
  • btop CPU% display accurate with global_ticks

🤖 Generated with Claude Code

ryanbreen and others added 2 commits March 11, 2026 05:31
- DNS: try Google (8.8.8.8) first instead of hypervisor-specific servers.
  All platforms NAT/bridge to host networking, so Google is universally
  reachable. Avoids 5s timeout per unreachable hypervisor DNS server.
- DNS: reduce per-server timeout from 5s to 500ms with millisecond
  precision (hypervisor DNS responds in <50ms, public DNS in <200ms).
- HTTP: resolve_multi() delegates to resolve_auto() — single DNS
  server order, no duplicate logic.
- Tracing: DNS logs each server attempt with elapsed time; HTTP logs
  DNS, TCP connect, and response receive phases with cumulative timing.
  All guarded by #[cfg(feature = "std")].
- ARM64: increase network RX poll from 20Hz to 100Hz (every 10th tick
  instead of 50th) for 10ms max latency instead of 50ms.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- boot.S: Add SPAN bit to SCTLR_EL1 (don't auto-set PAN on exception
  entry) and explicitly clear PAN on both primary and secondary CPUs.
  VMware sets PAN=1 by default, causing permission faults on user-mapped
  page accesses from kernel code.
- boot.S: Compute relocation delta (x21) on secondary CPU entry for
  VMware where RAM starts at 0x80000000 vs link address 0x40080000.
  Apply delta to all symbol references from literal pools (SMP_UART_PHYS,
  SMP_STACK_BASE_PHYS, exception_vectors_boot, SMP_MAIR/TCR/TTBR).
- smp.rs: Add ram_base_offset() to SECONDARY_CPU_ENTRY_PHYS for correct
  physical entry point on VMware.
- boot.S: Secondary CPUs now initialize SCTLR_EL1 to match primary
  (LSMAOE, nTLSMD, SPAN, EOS) for PSCI direct-EL1 path.
- handlers.rs: Fix sys_fcntl to use single mutable borrow instead of
  drop-and-reacquire pattern, return EAGAIN instead of EBADF on lock
  contention.
- procfs: Add global_ticks to /proc/stat for accurate CPU% in btop.
- btop: Use global_ticks for CPU% delta (matches per-process tick
  scale), filter out Terminated processes from display.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
@ryanbreen ryanbreen merged commit 507e815 into main Mar 11, 2026
1 of 4 checks passed
@ryanbreen ryanbreen deleted the feat/vmware-smp branch March 11, 2026 09:42
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant