Use ldrb instead of ldrh+bic for thumb-mode svc immediates

[chrisnc]

No description provided.

[chrisnc]

I noticed this while trying to get the armeb targets to work on this repo, which is indeed a can of worms... There are in effect five different flavors with different behavior:

• little-endian (same in qemu and real hardware)
• BE-8 hardware (e.g., bi-endian Armv7 cores with CPSR.E set)
• BE-32 hardware (e.g., TI Hercules TMS570)
• BE-8 qemu
• BE-32 qemu

Between BE-8 and BE-32 on qemu, BE-8 is the closest to working. Once qemu is patched to interpret semihosting parameter blocks in the true endianness of the target, some of the tests in this repo start working, except for interrupts and svc-related tests. On BE-8, the svc immediate reading code is incorrect because instructions are still little-endian encoded, but ldr will load as big-endian, so you need a byte swap to get the correct value... For interrupts, I suspect that the VIC registers' endianness may be little-endian even when running qemu with cfgend=true.

[jonathanpallant]

Times like these I am very grateful for the test suite we have. If CI passes, I'll merge it.