Update PMSA types

aarch32-cpu/src/pmsav8.rs

@@ -53,8 +53,8 @@ impl El1Mpu {
         register::Prselr::write(register::Prselr(idx as u32));
         let prbar = register::Prbar::read();
         let prlar = register::Prlar::read();
-        let start_addr = (prbar.base().value() << 6) as *mut u8;
-        let end_addr = ((prlar.limit().value() << 6) | 0x3F) as *mut u8;
+        let start_addr = prbar.base_address();
+        let end_addr = prlar.limit_address();
         Some(El1Region {
             range: start_addr..=end_addr,
             shareability: prbar.shareability(),

aarch32-cpu/src/register/armv8r/prbar.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR (*Protection Region Base Address Register*)
 
-use arbitrary_int::u26;
+use arbitrary_int::{traits::Integer, u26};
 
 use crate::register::{SysReg, SysRegRead, SysRegWrite};
 
@@ -81,4 +81,9 @@ impl Prbar {
             <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
+
+    /// Get the base address
+    pub fn base_address(self) -> *mut u8 {
+        (self.base().as_usize() << 6) as *mut u8
+    }
 }

aarch32-cpu/src/register/armv8r/prbar0.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR0 (*Protection Region Base Address Register 0*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR0 (*Protection Region Base Address Register 0*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar0 {}
 impl Prbar0 {
     #[inline]
     /// Reads PRBAR0 (*Protection Region Base Address Register 0*)
-    pub fn read() -> Prbar0 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar0 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar1.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR1 (*Protection Region Base Address Register 1*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR1 (*Protection Region Base Address Register 1*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar1 {}
 impl Prbar1 {
     #[inline]
     /// Reads PRBAR1 (*Protection Region Base Address Register 1*)
-    pub fn read() -> Prbar1 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar1 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar10.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR10 (*Protection Region Base Address Register 10*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR10 (*Protection Region Base Address Register 10*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar10 {}
 impl Prbar10 {
     #[inline]
     /// Reads PRBAR10 (*Protection Region Base Address Register 10*)
-    pub fn read() -> Prbar10 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar10 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar11.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR11 (*Protection Region Base Address Register 11*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR11 (*Protection Region Base Address Register 11*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar11 {}
 impl Prbar11 {
     #[inline]
     /// Reads PRBAR11 (*Protection Region Base Address Register 11*)
-    pub fn read() -> Prbar11 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar11 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar12.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR12 (*Protection Region Base Address Register 12*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR12 (*Protection Region Base Address Register 12*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar12 {}
 impl Prbar12 {
     #[inline]
     /// Reads PRBAR12 (*Protection Region Base Address Register 12*)
-    pub fn read() -> Prbar12 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar12 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar13.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR13 (*Protection Region Base Address Register 13*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR13 (*Protection Region Base Address Register 13*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar13 {}
 impl Prbar13 {
     #[inline]
     /// Reads PRBAR13 (*Protection Region Base Address Register 13*)
-    pub fn read() -> Prbar13 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar13 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar14.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR14 (*Protection Region Base Address Register 14*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR14 (*Protection Region Base Address Register 14*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar14 {}
 impl Prbar14 {
     #[inline]
     /// Reads PRBAR14 (*Protection Region Base Address Register 14*)
-    pub fn read() -> Prbar14 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar14 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar15.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR15 (*Protection Region Base Address Register 15*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR15 (*Protection Region Base Address Register 15*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar15 {}
 impl Prbar15 {
     #[inline]
     /// Reads PRBAR15 (*Protection Region Base Address Register 15*)
-    pub fn read() -> Prbar15 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar15 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar2.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR2 (*Protection Region Base Address Register 2*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR2 (*Protection Region Base Address Register 2*)
 #[derive(Debug, Clone, Copy)]
@@ -20,9 +20,9 @@ impl crate::register::SysRegRead for Prbar2 {}
 
 impl Prbar2 {
     #[inline]
-    /// Reads PRBAR2 (*Protection Region Base Address Register 2*)
-    pub fn read() -> Prbar2 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    /// Reads PRBAR0 (*Protection Region Base Address Register 2*)
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar2 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar3.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR3 (*Protection Region Base Address Register 3*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR3 (*Protection Region Base Address Register 3*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar3 {}
 impl Prbar3 {
     #[inline]
     /// Reads PRBAR3 (*Protection Region Base Address Register 3*)
-    pub fn read() -> Prbar3 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar3 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }

aarch32-cpu/src/register/armv8r/prbar4.rs

@@ -1,6 +1,6 @@
 //! Code for managing PRBAR4 (*Protection Region Base Address Register 4*)
 
-use crate::register::{SysReg, SysRegRead, SysRegWrite};
+use crate::register::{Prbar, SysReg, SysRegRead, SysRegWrite};
 
 /// PRBAR4 (*Protection Region Base Address Register 4*)
 #[derive(Debug, Clone, Copy)]
@@ -21,8 +21,8 @@ impl crate::register::SysRegRead for Prbar4 {}
 impl Prbar4 {
     #[inline]
     /// Reads PRBAR4 (*Protection Region Base Address Register 4*)
-    pub fn read() -> Prbar4 {
-        unsafe { Self(<Self as SysRegRead>::read_raw()) }
+    pub fn read() -> Prbar {
+        unsafe { Prbar::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
     }
 }
 
@@ -35,9 +35,9 @@ impl Prbar4 {
     /// # Safety
     ///
     /// Ensure that this value is appropriate for this register
-    pub unsafe fn write(value: Self) {
+    pub unsafe fn write(value: Prbar) {
         unsafe {
-            <Self as SysRegWrite>::write_raw(value.0);
+            <Self as SysRegWrite>::write_raw(value.raw_value());
         }
     }
 }