Fixed compilation error (in case without networking)

arch/arm/mach-s5l8930/clock.c

@@ -82,7 +82,7 @@ static unsigned long s5l_pll_get_rate(struct s5l_pll *_pll)
 		return 0;
 
 	base = (((uint64_t)PLLCON0_P(conf)) << PLLCON0_S(conf));
-	freq = (PLLCON0_M(conf) * (uint64_t)CLOCK_BASE_HZ);
+	freq = ((uint64_t)PLLCON0_M(conf) * (uint64_t)CLOCK_BASE_HZ);
 	do_div(freq, base);
 	return freq;
 }
@@ -298,7 +298,8 @@ static struct clksrc_clk clk_system1 = {
 	.clk = {
 		.name = "system1",
 		.id = -1,
-		.parent = &clk_system0.clk,
+//		.parent = &clk_system0.clk,
+		.parent = &clk_system_source.clk,
 	},
 
 	.reg_div = { .reg = VA_PMGR0 + 0x40, .shift = SHIFT_DIV2, .size = SIZE_DIV },

arch/arm/mach-s5l8930/cpu.c

@@ -27,7 +27,7 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/iic.h>
-#include <plat/regs-serial.h>
+#include <plat/regs-uart.h>
 #include <plat/irq-vic-timer.h>
 #include <plat/sdhci.h>
 
@@ -134,6 +134,12 @@ static struct map_desc s5l8930_iodesc[] __initdata = {
 		.length		= SZ_PWM,
 		.type		= MT_DEVICE,
 	},
+	{
+		.virtual	= (unsigned long)VA_CHIPID,
+		.pfn		= __phys_to_pfn(PA_CHIPID),
+		.length		= SZ_CHIPID,
+		.type		= MT_DEVICE,
+	},
 };
 
 static __init void s5l8930_cpu_map_io(void)
@@ -180,7 +186,7 @@ static struct platform_device cdma_dev = {
 	.num_resources = ARRAY_SIZE(cdma_res),
 
 	.dev = {
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 };
 
@@ -224,18 +230,18 @@ static struct cpu_table cpu_id[] __initdata = {
 	},
 };
 
-#define S5L8930_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
-				 S3C2410_UCON_RXILEVEL |	\
-				 S3C2410_UCON_TXIRQMODE |	\
-				 S3C2410_UCON_RXIRQMODE |	\
-				 S3C2410_UCON_RXFIFO_TOI |	\
-				 S3C2443_UCON_RXERR_IRQEN)
+#define S5L8930_UCON_DEFAULT	(S5L8930_UCON_TXIRQMODE |	\
+				 S5L8930_UCON_RXIRQMODE)
 
-#define S5L8930_ULCON_DEFAULT	S3C2410_LCON_CS8
+#define S5L8930_ULCON_DEFAULT	S5L8930_LCON_CS8
+#if 0
 
-#define S5L8930_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
+#define S5L8930_UFCON_DEFAULT	(S5L8930_UFCON_FIFOMODE |	\
 				 S3C2440_UFCON_RXTRIG8 |	\
 				 S3C2440_UFCON_TXTRIG16)
+#else
+#define S5L8930_UFCON_DEFAULT	(S5L8930_UFCON_FIFOMODE)
+#endif
 
 static struct s3c24xx_uart_clksrc s5l8930_uart_srcs[] = {
 	[0] = {
@@ -295,23 +301,18 @@ EXPORT_SYMBOL(s3c_setup_uart_cfg_gpio);
 
 void __init s5l8930_map_io(void)
 {
+//	unsigned long idcode = __raw_readl(VA_CHIPID);
+//	printk(KERN_ERR "%s:%d IDCODE=%x\n", __FUNCTION__, __LINE__, idcode);
 	s3c_init_cpu(0x8930, cpu_id, ARRAY_SIZE(cpu_id));
 	s3c24xx_init_clocks(24000000);
 	s3c24xx_init_uarts(s5l8930_uartcfgs, ARRAY_SIZE(s5l8930_uartcfgs));
 }
 
-static void __initdata __iomem *s5l8930_vics[] = {
-	VA_VIC0,
-	VA_VIC1,
-	VA_VIC2,
-	VA_VIC3,
-};
-
 void __init s5l8930_init_irq(void)
 {
+	u32 vic[] = {~0, ~0, ~0, ~0};
 	printk("%s\n", __func__);
-	s5l_init_vics(s5l8930_vics, ARRAY_SIZE(s5l8930_vics));
-	s3c_init_vic_timer_irq(1, IRQ_TIMER);
+	s5l_init_irq(vic, ARRAY_SIZE(vic));
 	printk("%s done\n", __func__);
 }
 

arch/arm/mach-s5l8930/dev-clcd.c

@@ -52,7 +52,7 @@ static struct platform_device clcd_dev = {
 	.dev = {
 		.platform_data = &dp_info,
 
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 };
 

arch/arm/mach-s5l8930/dev-h2fmi.c

@@ -77,6 +77,7 @@ static struct h2fmi_smth h2fmi_smth_ipt4g = { { 0, 0, 0, 5, 5, 5, 5, 0 }, { 0x33
 static struct h2fmi_smth h2fmi_smth_atv2g = { { 0, 0, 0, 3, 3, 3, 4, 0 }, { 0x3333, 0xCCCC, 0 } };
 #endif
 
+#if 0
 static int count_bits(u32 _val)
 {
 	int ret = 0;
@@ -91,6 +92,7 @@ static int count_bits(u32 _val)
 
 	return ret;
 }
+#endif
 
 static struct h2fmi_platform_data pdata0 = {
 	.ecc_step_shift = 10,
@@ -121,7 +123,7 @@ static struct platform_device h2fmi0 = {
 
 	.dev = {
 		.platform_data = &pdata0,
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 };
 
@@ -134,7 +136,7 @@ static struct platform_device h2fmi1 = {
 
 	.dev = {
 		.platform_data = &pdata1,
-		.coherent_dma_mask = DMA_32BIT_MASK,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
 	},
 };
 

arch/arm/mach-s5l8930/include/mach/irqs.h

@@ -13,8 +13,6 @@
 
 #include <plat/irqs.h>
 
-#define IRQ_TIMER	0x11
-
 #define IRQ_TIMER0_VIC	300
 #define IRQ_TIMER1_VIC	301
 #define IRQ_TIMER2_VIC	302
@@ -32,10 +30,10 @@
 
 #define IRQ_GPIO	0x74
 
-#define IRQ_UART0	0x16
-#define IRQ_UART1	0x17
-#define IRQ_UART2	0x18
-#define IRQ_UART3	0x19
+#define IRQ_UART0		S5L_IRQ_VIC0(22)
+#define IRQ_UART1		S5L_IRQ_VIC0(23)
+#define IRQ_UART2		S5L_IRQ_VIC0(24)
+#define IRQ_UART3		S5L_IRQ_VIC0(25)
 
 #define IRQ_HSMMC0	0x26
 

arch/arm/mach-s5l8930/include/mach/map.h

@@ -191,6 +191,10 @@
 #define PA_DISPLAYPORT	0x84900000
 #define SZ_DISPLAYPORT	0x2000
 
+#define PA_CHIPID		0xBF500000
+#define SZ_CHIPID		0x1000
+#define VA_CHIPID		(S3C_ADDR_CPU(0x900000))
+
 // S3C mappings
 
 #define S3C_PA_USB_HSOTG	PA_USB

arch/arm/mach-s5l8930/include/mach/system.h

@@ -1,4 +1,5 @@
 /**
+ * Copyright (c) 2012 Alexey Makhalov (makhaloff@gmail.com)
  * Copyright (c) 2011 Richard Ian Taylor.
  *
  * This file is part of the iDroid Project. (http://www.idroidproject.org).
@@ -14,6 +15,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <mach/map.h>
 #include <asm/proc-fns.h>
 
 static inline void arch_idle(void)
@@ -26,7 +28,13 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char* cmd)
 {
-	// TODO: Implement PMGR.
+	while (1) {
+		__raw_writel(0,	VA_PMGR0 + 0x202c);
+		__raw_writel(1, VA_PMGR0 + 0x2024);
+		__raw_writel(0x80000000, VA_PMGR0 + 0x2020);
+		__raw_writel(4, VA_PMGR0 + 0x202c);
+		__raw_writel(0, VA_PMGR0 + 0x2020);
+	}
 }
 
 #endif //_S5L8930_SYSTEM_

arch/arm/mach-s5l8930/mach-ipodtouch4g.c

@@ -58,6 +58,7 @@ static struct fb_videomode video_mode = {
 	.flag = 0xD,
 };
 
+#if 0
 static struct gpio_keys_button buttons[] = {
 	[0] = {
 		.type = EV_KEY,
@@ -110,6 +111,7 @@ static struct spi_board_info __initdata spidevs[] = {
 		.platform_data = &z2_data,
 	},
 };
+#endif
 
 static void __init ipt4g_init(void)
 {

arch/arm/mach-s5l8930/time.c

@@ -5,7 +5,7 @@
 #include <mach/time.h>
 #include <asm/mach/time.h>
 
-static void timer_disable()
+static void timer_disable(void)
 {
 	//printk("%s\n", __func__);
 	writel(2, S5L_TIMER0_CTRL);

arch/arm/plat-s5l/Kconfig

@@ -17,7 +17,6 @@ config PLAT_S5L
 	select S3C_GPIO_CFG_S3C24XX
 	select SAMSUNG_CLKSRC
 	select SAMSUNG_IRQ_VIC_TIMER
-	select SAMSUNG_IRQ_UART
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_IRQ_CHIP
 	help

arch/arm/plat-s5l/Makefile

@@ -3,7 +3,7 @@
 #	This file is part of the iDroid Project 
 #	(http://www.idroidproject.org/).
 
-obj-y					:= dev-uart.o
+obj-y					:= dev-uart.o irq-uart.o
 obj-m					:=
 obj-n					:=
 obj-					:=

arch/arm/plat-s5l/include/plat/irq-uart.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2012 Alexey Makhalov (makhaloff@gmail.com).
+ *
+ * Based on arch/arm/plat-samsung/include/plat/irq-uart.h
+ *
+ * Internal header file for Samsung S5L8930 serial ports (UART0-3)
+ * Header file for Samsung SoC UART IRQ demux for S5L8930
+ *
+ * This file is part of the iDroid Project. (http://www.idroidproject.org).
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+struct s5l_uart_irq {
+	void __iomem	*regs;
+	unsigned int	 base_irq;
+	unsigned int	 parent_irq;
+};
+
+extern void s5l_init_uart_irqs(struct s5l_uart_irq *irq, unsigned int nr_irqs);
+

arch/arm/plat-s5l/include/plat/irq.h

@@ -14,6 +14,6 @@
 #include <linux/compiler.h>
 #include <linux/types.h>
 
-extern void s5l_init_vics(void __iomem **_bases, uint32_t _count);
+extern void s5l_init_irq(u32 *vic, u32 num_vic);
 
 #endif //_S5L_IRQ_

arch/arm/plat-s5l/include/plat/irqs.h

@@ -1,4 +1,5 @@
 /**
+ * Copyright (c) 2012 Alexey Makhalov (makhaloff@gmail.com).
  * Copyright (c) 2011 Richard Ian Taylor.
  *
  * Portions Copyright (c) 2009 Samsung Electronics Co., Ltd.
@@ -15,6 +16,30 @@
 
 #include <mach/irqs.h>
 
+/* we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ * note, since we're using the VICs, our start must be a
+ * mulitple of 32 to allow the common code to work
+ */
+
+#define S5L_IRQ_OFFSET		(0)
+
+#define S5L_IRQ(x)		((x) + S5L_IRQ_OFFSET)
+
+#define S5L_VIC0_BASE		S5L_IRQ(0)
+#define S5L_VIC1_BASE		S5L_IRQ(32)
+#define S5L_VIC2_BASE		S5L_IRQ(64)
+#define S5L_VIC3_BASE		S5L_IRQ(96)
+
+#define VIC_BASE(x)		(S5L_VIC0_BASE + ((x)*32))
+
+#define IRQ_VIC0_BASE		S5L_VIC0_BASE
+#define IRQ_VIC1_BASE		S5L_VIC1_BASE
+#define IRQ_VIC2_BASE		S5L_VIC2_BASE
+
 /* UART interrupts, each UART has 4 interrupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
  * are not in the same order as the S3C24XX series! */
@@ -50,4 +75,19 @@
 #define IRQ_S3CUART_RX2		IRQ_S5L_UART_RX2
 #define IRQ_S3CUART_RX3		IRQ_S5L_UART_RX3
 
+/* VIC based IRQs */
+
+#define S5L_IRQ_VIC0(x)		(S5L_VIC0_BASE + (x))
+#define S5L_IRQ_VIC1(x)		(S5L_VIC1_BASE + (x))
+#define S5L_IRQ_VIC2(x)		(S5L_VIC2_BASE + (x))
+#define S5L_IRQ_VIC3(x)		(S5L_VIC3_BASE + (x))
+
+#define S5L_TIMER_IRQ(x)	(11 + (x))
+
+#define IRQ_TIMER0		S5L_TIMER_IRQ(0)
+#define IRQ_TIMER1		S5L_TIMER_IRQ(1)
+#define IRQ_TIMER2		S5L_TIMER_IRQ(2)
+#define IRQ_TIMER3		S5L_TIMER_IRQ(3)
+#define IRQ_TIMER4		S5L_TIMER_IRQ(4)
+
 #endif //_S5L_IRQS_