Add Camera Support for Hamoa EVK by wenmliu · Pull Request #315 · qualcomm-linux/kernel

wenmliu · 2026-03-02T05:34:11Z

Add Camera Support for Hamoa EVK
CRs-Fixed: 4454729

Add a base schema initially compatible with x1e80100 to describe MIPI CSI2 PHY devices. The hardware can support both C-PHY and D-PHY modes. The CSIPHY devices have their own pinouts on the SoC as well as their own individual voltage rails. The need to model voltage rails on a per-PHY basis leads us to define CSIPHY devices as individual nodes. Two nice outcomes in terms of schema and DT arise from this change. 1. The ability to define on a per-PHY basis voltage rails. 2. The ability to require those voltage. We have had a complete bodge upstream for this where a single set of voltage rail for all CSIPHYs has been buried inside of CAMSS. Much like the I2C bus which is dedicated to Camera sensors - the CCI bus in CAMSS parlance, the CSIPHY devices should be individually modelled. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-csi2-phy-v3-1-11e608759410@linaro.org/

@lanes

Add a new MIPI CSI2 driver in DPHY mode initially. The entire set of existing CAMSS CSI PHY init sequences are imported in order to save time and effort in later patches. The following devices are supported in this drop: "qcom,x1e80100-csi2-phy" In-line with other PHY drivers the process node is included in the name. At the moment we follow the assignment of lane positions - the bitmap of physical input lanes to logical lane numbers as a linear list per the existing DPHY @lanes data-member. This is fine for us in upstream at the moment since we also map the lanes contiguously but, our hardware can support different lane mappings so we should in the future extend out the DPHY structure to capture the mapping. The Qualcomm 3PH class of PHYs can do both DPHY and CPHY mode. For now only DPHY is supported. In porting some of the logic over from camss-csiphy*.c to here its also possible to rationalise some of the code. In particular use of regulator_bulk and clk_bulk as well as dropping the seemingly useless and unused interrupt handler. The PHY sequences and a lot of the logic that goes with them are well proven in CAMSS and mature so the main thing to watch out for here is how to get the right sequencing of regulators, clocks and register-writes. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-csi2-phy-v3-2-11e608759410@linaro.org/

…andle definitions Add optional PHY handle definitions. This will allow for supporting both legacy PHY definitions as well as supporting the optional new handle based approach. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-1-a59c3f037d0b@linaro.org/

…mbo-mode endpoints Qualcomm CSI2 PHYs support a mode where two sensors may be attached to the one CSIPHY. When we have one endpoint we may have - DPHY 1, 2 or 4 data lanes + 1 clock lane - CPHY 3 wire data lane When we have two endpoints this indicates the special fixed combo-mode. - DPHY endpoint0 => 2+1 and endpoint1 => 1+1 data-lane/clock-lane combination. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-2-a59c3f037d0b@linaro.org/

…s: 5 Specify a minimum number of iommus entries. Currently the schema requires exactly eight. Add minItems to allow fewer entries while retaining the existing maximum. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-3-a59c3f037d0b@linaro.org/

…ies to be optional When CSIPHY devices are modelled as standalone PHY nodes the voltage rails are defined per-PHY. Allow the CAMSS-level supply properties to be omitted in this case. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-4-a59c3f037d0b@linaro.org/

…tructures Flag which SoCs have legacy - builtin PHY code. This will be useful in subsequent patches to inform PHY bringup logic if legacy bindings are available. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-5-a59c3f037d0b@linaro.org/

Add the ability to use a PHY pointer which interacts with the standard PHY API. In the first instance the code will try to use the new PHY interface. If no PHYs are present in the DT then the legacy method will be attempted. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-6-a59c3f037d0b@linaro.org/

x1e is the first CAMSS SoC to use the new PHY interface. Drop the redundant legacy CSIPHY descriptions. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v9-7-a59c3f037d0b@linaro.org/

Add the CAMCC block for x1e80100. The x1e80100 CAMCC block is an iteration of previous CAMCC blocks with the exception of having two required power-domains not just one. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-1-f3f7ddfbf849@linaro.org/

Add in two CCI buses. One bus has two CCI bus master pinouts: cci_i2c_sda0 = gpio101 cci_i2c_scl0 = gpio102 cci_i2c_sda1 = gpio103 cci_i2c_scl1 = gpio104 The second bus has two CCI bus master pinouts: cci_i2c_sda2 = gpio105 cci_i2c_scl2 = gpio106 aon_cci_i2c_sda3 = gpio235 aon_cci_i2c_scl3 = gpio236 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-2-f3f7ddfbf849@linaro.org/

Add csiphy nodes for - csiphy0 - csiphy1 - csiphy2 - csiphy4 The irregular naming of the PHYs comes directly from the hardware which for whatever reason skipped csiphy3. Separating the nodes from CAMSS as we have done with the sensor I2C bus aka the CCI interface is justified since the CSIPHYs have their own pinouts and voltage rails. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-3-f3f7ddfbf849@linaro.org/

Add dtsi to describe the xe180100 CAMSS block 4 x CSIPHY 3 x TPG 2 x CSID 2 x CSID Lite 2 x IFE 2 x IFE Lite Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-4-f3f7ddfbf849@linaro.org/

…gulators Add pmic,id = m rpmh to regulator definitions. This regulator set provides vreg_l3m_1p8 the regulator for the ov08x40 RGB sensor on the CRD. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-5-f3f7ddfbf849@linaro.org/

…SIPHY4 Define ov08x40 on cci1_i2c1. The RGB sensor appears on the AON CCI pins connected to CSIPHY4 in four lane mode. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-6-f3f7ddfbf849@linaro.org/

…h voltage levels for IR and RGB camera Add the PM8010 PMIC providing the following voltage rails: vreg_l1m_r @ 1v2 IR sensor vreg_l2m_r @ 1v2 RGB sensor vreg_l3m_r @ 1v8 IR sensor vreg_l4m_r @ 1v8 RGB sensor vreg_l5m_r @ 2v8 IR sensor vreg_l7m_r @ 2v8 RGB sensor Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-7-f3f7ddfbf849@linaro.org/

…on CSIPHY4 Switch on the ov02c10 RGB sensor on CSIPHY4. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-8-f3f7ddfbf849@linaro.org/

…amera PMIC with voltage levels for IR and RGB camera Add voltage regulators-8 for Camera on slim7x including: - vreg_l7m_2p8 - vreg_l2m_1p2 - vreg_l4m_1p8 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.or> Link: https://lore.kernel.org/all/20260226-x1e-camss-csi2-phy-dtsi-v1-9-f3f7ddfbf849@linaro.org/

Add pm8010 L4M regulator which is used by Camera I2C pull-up. Signed-off-by: Tingguo Cheng <tingguo.cheng@oss.qualcomm.com> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-1-36f895a24d8f@oss.qualcomm.com/

Enable IMX577 via CCI on Hamoa EVK Core Kit. The Hamoa EVK board does not include a camera sensor by default, this DTSO has enabled the Arducam 12.3MP IMX577 Mini Camera Module on the CSI-1 interface. Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-2-36f895a24d8f@oss.qualcomm.com/

qcomlnxci · 2026-03-02T12:52:31Z

Test jobs on edfe235

qcomlnxci · 2026-03-02T12:52:33Z

Test Matrix

Test Case	kaanapali-mtp	lemans-evk	monaco-evk	qcs615-ride	qcs6490-rb3gen2	qcs8300-ride	qcs9100-ride-r3	sm8750-mtp	x1e80100-crd
0_qcom-next-ci-premerge-tests	◻️	◻️	◻️	◻️	◻️	◻️	◻️	❌ Fail	◻️
BT_FW_KMD_Service	◻️	❌ Fail	❌ Fail	◻️	✅ Pass	✅ Pass	✅ Pass	❌ Fail	◻️
BT_ON_OFF	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	⚠️ skip	◻️
BT_SCAN	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	⚠️ skip	◻️
CPUFreq_Validation	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
CPU_affinity	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
DSP_AudioPD	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	◻️	◻️
Ethernet	◻️	⚠️ skip	⚠️ skip	◻️	⚠️ skip	⚠️ skip	⚠️ skip	⚠️ skip	◻️
Freq_Scaling	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	❌ Fail	◻️
GIC	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
IPA	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
Interrupts	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
OpenCV	◻️	⚠️ skip	⚠️ skip	◻️	⚠️ skip	⚠️ skip	⚠️ skip	◻️	◻️
PCIe	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
Probe_Failure_Check	◻️	❌ Fail	❌ Fail	◻️	✅ Pass	✅ Pass	✅ Pass	❌ Fail	◻️
RMNET	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
UFS_Validation	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
USBHost	◻️	❌ Fail	❌ Fail	◻️	❌ Fail	✅ Pass	✅ Pass	❌ Fail	◻️
WiFi_Firmware_Driver	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	◻️	◻️
WiFi_OnOff	◻️	✅ Pass	⚠️ skip	◻️	✅ Pass	✅ Pass	✅ Pass	◻️	◻️
cdsp_remoteproc	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	❌ Fail	◻️
hotplug	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
irq	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
kaslr	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
pinctrl	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
qcom_hwrng	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	◻️	◻️
remoteproc	◻️	✅ Pass	❌ Fail	◻️	✅ Pass	❌ Fail	✅ Pass	❌ Fail	◻️
rngtest	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
shmbridge	◻️	✅ Pass	❌ Fail	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
smmu	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️
watchdog	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	◻️	◻️
wpss_remoteproc	◻️	✅ Pass	✅ Pass	◻️	✅ Pass	✅ Pass	✅ Pass	✅ Pass	◻️

0xB0D and others added 19 commits March 2, 2026 13:19

wenmliu force-pushed the qcom-6.18.y branch 3 times, most recently from 2fa8571 to 6b96b34 Compare March 2, 2026 06:14

wenmliu force-pushed the qcom-6.18.y branch from 6b96b34 to edfe235 Compare March 2, 2026 06:16

quic-tingweiz approved these changes Mar 2, 2026

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Add Camera Support for Hamoa EVK#315

Add Camera Support for Hamoa EVK#315
wenmliu wants to merge 20 commits intoqualcomm-linux:qcom-6.18.yfrom
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wenmliu commented Mar 2, 2026

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qcomlnxci commented Mar 2, 2026

Test jobs on edfe235

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qcomlnxci commented Mar 2, 2026

Test Matrix

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