harm: Applying relocations

aarchmrs-instructions/src/lib.rs

@@ -15,7 +15,7 @@ instruction variant described in the dataset, a corresponding Rust function is
 generated.
 
 The source code of this crate is generated by tools at the same repository at
-https://github.com/monoid/harm.
+<https://github.com/monoid/harm>.
 
 As with the original dataset, this code is licensed under BSD-3-Clause license.
 

harm/src/instructions/control/branch_imm.rs

@@ -127,7 +127,7 @@ impl RelocatableInstruction for Branch<LabelRef> {
         let zero = BranchOffset::default();
 
         let code = B_only_branch_imm(zero.into());
-        let reloc = Rel64::Jump26(self.0);
+        let reloc = Rel64::jump26(self.0);
 
         (code, Some(reloc))
     }
@@ -186,7 +186,7 @@ impl RelocatableInstruction for Branch<(BranchCond, LabelRef)> {
         let (cond, label_ref) = self.0;
 
         let code = B_only_condbranch(zero.into(), cond.into());
-        let reloc = Rel64::CondBr19(label_ref);
+        let reloc = Rel64::cond_br19(label_ref);
 
         (code, Some(reloc))
     }
@@ -254,7 +254,7 @@ impl RelocatableInstruction for BranchLink<LabelRef> {
         let zero = BranchOffset::default();
 
         let code = BL_only_branch_imm(zero.into());
-        let reloc = Rel64::Call26(self.0);
+        let reloc = Rel64::call26(self.0);
 
         (code, Some(reloc))
     }
@@ -394,7 +394,7 @@ impl RelocatableInstruction for CompareBranch<RegOrZero64, LabelRef> {
         }
         .to_code();
 
-        let reloc = Rel64::CondBr19(self.offset);
+        let reloc = Rel64::cond_br19(self.offset);
 
         (code, Some(reloc))
     }
@@ -425,7 +425,7 @@ impl RelocatableInstruction for CompareBranch<RegOrZero32, LabelRef> {
         }
         .to_code();
 
-        let reloc = Rel64::CondBr19(self.offset);
+        let reloc = Rel64::cond_br19(self.offset);
 
         (code, Some(reloc))
     }
@@ -712,7 +712,7 @@ mod tests {
 
         let (code, reloc) = inst.to_code_with_reloc();
         assert_eq!(code, cbz(X3, CompareBranchOffset::default()).to_code());
-        assert_eq!(reloc, Some(Rel64::CondBr19(label)));
+        assert_eq!(reloc, Some(Rel64::cond_br19(label)));
     }
 
     #[test]
@@ -725,7 +725,7 @@ mod tests {
 
         let (code, reloc) = inst.to_code_with_reloc();
         assert_eq!(code, cbz(W4, CompareBranchOffset::default()).to_code());
-        assert_eq!(reloc, Some(Rel64::CondBr19(label)));
+        assert_eq!(reloc, Some(Rel64::cond_br19(label)));
     }
 
     #[test]
@@ -738,7 +738,7 @@ mod tests {
 
         let (code, reloc) = inst.to_code_with_reloc();
         assert_eq!(code, cbnz(X5, CompareBranchOffset::default()).to_code());
-        assert_eq!(reloc, Some(Rel64::CondBr19(label)));
+        assert_eq!(reloc, Some(Rel64::cond_br19(label)));
     }
 
     #[test]
@@ -751,6 +751,6 @@ mod tests {
 
         let (code, reloc) = inst.to_code_with_reloc();
         assert_eq!(code, cbnz(W6, CompareBranchOffset::default()).to_code());
-        assert_eq!(reloc, Some(Rel64::CondBr19(label)));
+        assert_eq!(reloc, Some(Rel64::cond_br19(label)));
     }
 }

harm/src/instructions/control/testbranch.rs

@@ -128,7 +128,7 @@ impl RelocatableInstruction for TestBranch<RegOrZero64, TestBranchBit64, LabelRe
             offset: TestBranchOffset::default(),
         }
         .to_code();
-        let rel = Rel64::TstBr14(self.offset.clone());
+        let rel = Rel64::tst_br14(self.offset.clone());
         (code, Some(rel))
     }
 }
@@ -143,7 +143,7 @@ impl RelocatableInstruction for TestBranch<RegOrZero32, TestBranchBit32, LabelRe
             offset: TestBranchOffset::default(),
         }
         .to_code();
-        let rel = Rel64::TstBr14(self.offset.clone());
+        let rel = Rel64::tst_br14(self.offset.clone());
         (code, Some(rel))
     }
 }
@@ -321,7 +321,7 @@ mod tests {
         };
         let (opcode, rel) = tbz(X2, bit, label.clone()).to_code_with_reloc();
         assert_eq!(opcode, tbz(X2, bit, TestBranchOffset::default()).to_code());
-        assert_eq!(rel, Some(Rel64::TstBr14(label)));
+        assert_eq!(rel, Some(Rel64::tst_br14(label)));
     }
 
     #[test]
@@ -333,6 +333,6 @@ mod tests {
         };
         let (opcode, rel) = tbnz(X2, bit, label.clone()).to_code_with_reloc();
         assert_eq!(opcode, tbnz(X2, bit, TestBranchOffset::default()).to_code());
-        assert_eq!(rel, Some(Rel64::TstBr14(label)));
+        assert_eq!(rel, Some(Rel64::tst_br14(label)));
     }
 }

harm/src/instructions/dpimm/movewide/movewide_reloc.rs

@@ -164,7 +164,7 @@ impl MoveWideReloc64 for AbsG0 {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG0(self.0)
+        Rel64::mov_w_abs_g0(self.0)
     }
 }
 
@@ -176,7 +176,7 @@ impl MoveWideReloc64 for AbsG0Nc {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG0Nc(self.0)
+        Rel64::mov_w_abs_g0nc(self.0)
     }
 }
 
@@ -188,7 +188,7 @@ impl MoveWideReloc64 for AbsG0S {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG0S(self.0)
+        Rel64::mov_w_abs_g0s(self.0)
     }
 }
 
@@ -200,7 +200,7 @@ impl MoveWideReloc64 for AbsG1 {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG1(self.0)
+        Rel64::mov_w_abs_g1(self.0)
     }
 }
 
@@ -212,7 +212,7 @@ impl MoveWideReloc64 for AbsG1Nc {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG1Nc(self.0)
+        Rel64::mov_w_abs_g1nc(self.0)
     }
 }
 
@@ -224,7 +224,7 @@ impl MoveWideReloc64 for AbsG1S {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG1S(self.0)
+        Rel64::mov_w_abs_g1s(self.0)
     }
 }
 
@@ -236,7 +236,7 @@ impl MoveWideReloc64 for AbsG2 {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG2(self.0)
+        Rel64::mov_w_abs_g2(self.0)
     }
 }
 
@@ -248,7 +248,7 @@ impl MoveWideReloc64 for AbsG2Nc {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG2Nc(self.0)
+        Rel64::mov_w_abs_g2nc(self.0)
     }
 }
 
@@ -260,7 +260,7 @@ impl MoveWideReloc64 for AbsG2S {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG2S(self.0)
+        Rel64::mov_w_abs_g2s(self.0)
     }
 }
 
@@ -272,7 +272,7 @@ impl MoveWideReloc64 for AbsG3 {
 
     #[inline]
     fn get_relocation(&self) -> Rel64 {
-        Rel64::MovWAbsG3(self.0)
+        Rel64::mov_w_abs_g3(self.0)
     }
 }
 
@@ -414,7 +414,7 @@ mod tests {
         };
         let inst = movz(X1, abs_g0(label)).to_code_with_reloc();
         assert_eq!(inst.0, movz(X1, (0, 0)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG0(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g0(label)));
     }
 
     #[test]
@@ -425,7 +425,7 @@ mod tests {
         };
         let inst = movk(X2, abs_g1(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(X2, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1(label)));
     }
 
     #[test]
@@ -437,7 +437,7 @@ mod tests {
         // Makes little sense, but gas accepts it.
         let inst = movn(X3, abs_g1_s(label)).to_code_with_reloc();
         assert_eq!(inst.0, movn(X3, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1S(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1s(label)));
     }
 
     #[test]
@@ -448,7 +448,7 @@ mod tests {
         };
         let inst = movk(X4, abs_g1_nc(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(X4, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1Nc(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1nc(label)));
     }
 
     #[test]
@@ -459,7 +459,7 @@ mod tests {
         };
         let inst = movz(X5, abs_g2(label)).to_code_with_reloc();
         assert_eq!(inst.0, movz(X5, (0, 32)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG2(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g2(label)));
     }
 
     #[test]
@@ -470,7 +470,7 @@ mod tests {
         };
         let inst = movz(X6, abs_g2_s(label)).to_code_with_reloc();
         assert_eq!(inst.0, movz(X6, (0, 32)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG2S(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g2s(label)));
     }
 
     #[test]
@@ -481,7 +481,7 @@ mod tests {
         };
         let inst = movk(X7, abs_g2_nc(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(X7, (0, 32)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG2Nc(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g2nc(label)));
     }
 
     #[test]
@@ -492,7 +492,7 @@ mod tests {
         };
         let inst = movk(X8, abs_g3(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(X8, (0, 48)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG3(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g3(label)));
     }
 
     #[test]
@@ -503,7 +503,7 @@ mod tests {
         };
         let inst = movz(W1, abs_g0(label)).to_code_with_reloc();
         assert_eq!(inst.0, movz(W1, (0, 0)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG0(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g0(label)));
     }
 
     #[test]
@@ -514,7 +514,7 @@ mod tests {
         };
         let inst = movk(W2, abs_g1(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(W2, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1(label)));
     }
 
     #[test]
@@ -526,7 +526,7 @@ mod tests {
         // Makes little sense, but gas accepts it.
         let inst = movn(W3, abs_g1_s(label)).to_code_with_reloc();
         assert_eq!(inst.0, movn(W3, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1S(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1s(label)));
     }
 
     #[test]
@@ -537,6 +537,6 @@ mod tests {
         };
         let inst = movk(W4, abs_g1_nc(label)).to_code_with_reloc();
         assert_eq!(inst.0, movk(W4, (0, 16)).unwrap().to_code());
-        assert_eq!(inst.1, Some(Rel64::MovWAbsG1Nc(label)));
+        assert_eq!(inst.1, Some(Rel64::mov_w_abs_g1nc(label)));
     }
 }

harm/src/instructions/ldst.rs

@@ -67,6 +67,7 @@ pub type ScaledOffset8 = UBitValue<12, 0>;
 pub type ScaledOffset16 = UBitValue<12, 1>;
 pub type ScaledOffset32 = UBitValue<12, 2>;
 pub type ScaledOffset64 = UBitValue<12, 3>;
+pub type ScaledOffset128 = UBitValue<12, 4>;
 
 pub type UnscaledOffset = SBitValue<9>;
 

harm/src/instructions/ldst/ldr.rs

@@ -171,15 +171,15 @@ define_pc_offset_rules!(
     LDR,
     RegOrZero64,
     64,
-    crate::reloc::Rel64::LdPrelLo19
+    crate::reloc::Rel64::ld_prel_lo19
 );
 define_pc_offset_rules!(
     Ldr,
     MakeLdr,
     LDR,
     RegOrZero32,
     32,
-    crate::reloc::Rel64::LdPrelLo19
+    crate::reloc::Rel64::ld_prel_lo19
 );
 
 //

harm/src/instructions/ldst/ldrsw.rs

@@ -163,7 +163,7 @@ define_pc_offset_rules!(
     LDRSW,
     RegOrZero64,
     64,
-    crate::reloc::Rel64::LdPrelLo19
+    crate::reloc::Rel64::ld_prel_lo19
 );
 
 //