[asm] Handle PackOp inputs in regalloc liveness and linear scan#1144
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[asm] Handle PackOp inputs in regalloc liveness and linear scan#1144Hardcode84 wants to merge 1 commit intoiree-org:mainfrom
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PackOp is a register allocation directive: its N inputs must form a contiguous register block matching the pack result. Previously, pack inputs got independent allocations to arbitrary registers while the result got a correct contiguous allocation, leaving downstream consumers reading uninitialized physical registers. Fix by treating pack inputs as sub-registers of the pack result: - Liveness: extend the pack result's live range backwards to cover input defs, then remove inputs from allocation worklists. - LinearScanPass: post-pass assigns input[i].physReg = result + i, mirroring the existing ExtractOp post-pass. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Signed-off-by: Ivan Butygin <ivan.butygin@gmail.com>
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PackOp is a register allocation directive: its N inputs must form a contiguous register block matching the pack result. Previously, pack inputs got independent allocations to arbitrary registers while the result got a correct contiguous allocation, leaving downstream consumers reading uninitialized physical registers.
Fix by treating pack inputs as sub-registers of the pack result:
This is prerequisite for properly handling SRD construction instead of using raw asm ops.