Pinned Loading
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Image_Deduplication_Algorithm
Image_Deduplication_Algorithm PublicImage_Deduplication_Algorithm using Perceptual Hashing and Hamming Distance
C++
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CIE-PESU/CIE_RISCV_Project
CIE-PESU/CIE_RISCV_Project PublicRISC-V K-Nearest Neighbors Accelerator for Image Recognition on FPGA
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Dual_Clock_Asynchronous_FIFO_UVM
Dual_Clock_Asynchronous_FIFO_UVM PublicUVM 1.2 Verification of Dual Clock Asynchronous FIFO
SystemVerilog 2
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Spike_NN_ASIC
Spike_NN_ASIC PublicASIC Design Implementation of Spike-NN based Neuromorphic Processor (benchmarked using hardcoded dummy dataset values)
SystemVerilog 1
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FPGA_Prototyping_SystemVerilog-Verilog
FPGA_Prototyping_SystemVerilog-Verilog PublicSolved SystemVerilog/Verilog Examples from Pong-P-Chu book
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