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Dxsa mlir dcl constant buffer and other ops#133

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tagolog:dxsa-mlir-dcl_constant_buffer-and-other-ops
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Dxsa mlir dcl constant buffer and other ops#133
tagolog wants to merge 3 commits into
access-softek:dxsa-mlirfrom
tagolog:dxsa-mlir-dcl_constant_buffer-and-other-ops

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@tagolog tagolog commented May 21, 2026

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tagolog added 3 commits May 20, 2026 19:08
Example:
  dxsa.dcl_input %v0
  dxsa.dcl_output %o0

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
Encode the operand as an inline attribute instead of separate SSA values.

Example:
  dxsa.dcl_input <type = input, components = 4, mask = <x>, index = [0]>
  dxsa.dcl_output <type = output, components = 4, mask = <x, y, z, w>, index = [0]>

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
…t, dcl_hs_join_phase_instance_count, dcl_hs_max_tessfactor, dcl_index_range, dcl_output_sgv, dcl_output_siv and dcl_tgsm_raw instructions

Example:
  dxsa.dcl_constant_buffer <type = constant_buffer, components = 4, swizzle = <x, y, z, w>, index = [0, 1]>, <immediateIndexed>
  dxsa.dcl_hs_fork_phase_instance_count 4
  dxsa.dcl_hs_join_phase_instance_count 2
  dxsa.dcl_hs_max_tessfactor 6.400000e+01
  dxsa.dcl_index_range <type = input, components = 4, mask = <x, y, z, w>, index = [4]>, 6
  dxsa.dcl_output_sgv <type = output, components = 4, mask = <x>, index = [0]>, <primitiveID>
  dxsa.dcl_output_siv <type = output, components = 4, mask = <x, y, z, w>, index = [0]>, <position>
  dxsa.dcl_tgsm_raw <type = thread_group_shared_memory, components = 0, index = [0]>, 1024

Signed-off-by: Vladimir Shiryaev <tagolog@users.noreply.github.com>
@tagolog tagolog requested a review from asavonic May 21, 2026 05:34
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