GitHub - YousefYGhanem/16-bit-Pipelined-RISC-processor: Designing and testing a simple 16-bit Pipelined RISC processor with eight 16-bit general-purpose registers Using the Logisim simulator.

Name		Name	Last commit message	Last commit date
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PROJECTARCH.circ		PROJECTARCH.circ
Project2_Report.pdf		Project2_Report.pdf
logisim-win-2.7.1.exe		logisim-win-2.7.1.exe
testing.txt		testing.txt

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Designing and testing a simple 16-bit Pipelined RISC processor with eight 16-bit general-purpose registers Using the Logisim simulator.

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