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@byeonguk-jeong could you also rebase this one against current develop? We will tackle each PR separately. Thanks |
Fix critical bugs found in the SuperVector SIMD abstraction layer.
SuperVector operator!() — x86 (SSE/AVX2/AVX512), ppc64el:
- Was XOR-ing with self (always returns Zeroes instead of bitwise
NOT).
- Note that some other operators depends on operator!().
SuperVector<16> Ones_vshl() — x86:
- Called vshr_128() instead of vshl_128().
Element-wise shift boundary and Unroller range — x86:
- vshl_32/vshr_32 on SuperVector<16>: zero-boundary was N==16,
instead of N>=32; Unroller range was <1,16> not <1,32>.
- vshl_64/vshr_64 on SuperVector<16>: same issue.
- vshl_64/vshr_64 on SuperVector<32>: same issue.
- vshr_64 on SuperVector<64>: same issue.
SuperVector<32> vshr_256_imm — x86:
- Was a copy-paste of vshl_256_imm.
SuperVector<64> vshl_256_imm / vshl_512_imm — x86:
- Were unimplemented stubs returning empty SuperVector.
SuperVector<64> vshr_256_imm — x86:
- Operated on v256[0] only with broken SuperVector<32> logic.
SuperVector<64> vsh{l,r}_* — x86, ppc64el, arm:
- Were incorrectly delegating to vshl_128/vshr_128. (x86)
- Did not have boundary checks. PPC wraps when it tries to shift
more than bit length. (ppc64el)
- Had signed rshifts. (arm)
comparison operators - arm:
- operator>=: used vcgeq_u8 (unsigned) instead of vcgeq_s8 (signed).
- operator<=: used vcgeq_s8 (>=) instead of vcleq_s8 (<=).
Fixes: 1af82e3
Fixes: f0e6b84
Fixes: 2f55e5b
Signed-off-by: Byeonguk Jeong <jungbu2855@gmail.com>
These tests covers NOT operator and many of element-wise shifts, especially for AVX2, AVX512. Signed-off-by: Byeonguk Jeong <jungbu2855@gmail.com>
The match result vector (c_lo & c_hi) was compared using operator> against Zeroes to detect non-zero (matching) bytes. On ARM, operator> delegates to signed comparison (vcgtq_s8), which treats byte values with the high bit set (0x80–0xFF) as negative, making them compare as less than zero and falsely reporting no match. Fixes: 92e0b9a ("simplify shufti and provide arch-specific block functions") Signed-off-by: Byeonguk Jeong <jungbu2855@gmail.com>
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Done. Thanks. |
markos
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Apr 3, 2026
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Some good catches, and some things that were left unimplemented for too long! Thanks!
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Fix critical bugs found in the SuperVector SIMD abstraction layer.
SuperVector operator!() — x86 (SSE/AVX2/AVX512), ppc64el:
SuperVector<16> Ones_vshl() — x86:
Element-wise shift boundary and Unroller range — x86:
instead of N>=32; Unroller range was <1,16> not <1,32>.
SuperVector<32> vshr_256_imm — x86:
SuperVector<64> vshl_256_imm / vshl_512_imm — x86:
SuperVector<64> vshr_256_imm — x86:
SuperVector<64> vsh{l,r}_* — x86, ppc64el, arm:
more than bit length. (ppc64el)
comparison operators - arm:
ARM shufti blockSingleMask:
the broken signed comparison and missed matches with high-bit-set bytes.
Also adds comprehensive unit tests covering all fixed bugs.
@AhnLab-OSS @AhnLab-OSSG