xen/arch/x86/tpm.c: add CRB interface support + response validation fix#28
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accek-itl wants to merge 2 commits intoTrenchBoot:aem-staging-2026-03-13from
Open
xen/arch/x86/tpm.c: add CRB interface support + response validation fix#28accek-itl wants to merge 2 commits intoTrenchBoot:aem-staging-2026-03-13from
accek-itl wants to merge 2 commits intoTrenchBoot:aem-staging-2026-03-13from
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Assisted-by: Claude:claude-opus-4-6
Assisted-by: Claude:claude-opus-4-6
| * header (10) | parameterSize (4) | TPML_DIGEST_VALUES | authArea | ||
| * finish_r overlays: h (10) | paramSize (4) | hashCount (4) | hashes[] | ||
| */ | ||
| if ( o_size < sizeof(cmd_rsp.finish_r) + sizeof(uint32_t) ) |
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Why sizeof(uint32_t)? That's first hash alg and 2 first bytes of the hash.
| uint32_t data_buf_pa = TPM_BASE + CRB_DATA_BUFFER_(loc); | ||
| unsigned expected; | ||
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| crb_cmd_ready(loc); |
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Not sure why, but coreboot's driver follows this with a wait for no error in CRB_CTRL_STS_ and then a wait for CRB_CTRL_START_ being zero.
| tpm_write32(CRB_CTRL_RSP_ADDR_(loc), data_buf_pa); | ||
| tpm_write32(CRB_CTRL_RSP_ADDR_(loc) + 4, 0); | ||
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| memcpy(__va(data_buf_pa), buf, i_size); |
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No check for i_size being too large.
| } | ||
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| /* Read header to learn the response length. */ | ||
| memcpy(buf, __va(data_buf_pa), sizeof(struct tpm_rsp_hdr)); |
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*o_size could be too small here.
| static void crb_send_cmd(unsigned loc, uint8_t *buf, unsigned i_size, | ||
| unsigned *o_size) | ||
| { | ||
| uint32_t data_buf_pa = TPM_BASE + CRB_DATA_BUFFER_(loc); |
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Should make no difference but upstream will likely prefer this version:
Suggested change
| uint32_t data_buf_pa = TPM_BASE + CRB_DATA_BUFFER_(loc); | |
| paddr_t data_buf_pa = TPM_BASE + CRB_DATA_BUFFER_(loc); |
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