Disable prefix caching for qwen3.5 & glm5 AMD benchmarks

[functionstackx]

Disable prefix caching (radix cache) for qwen3.5 and glm5 AMD benchmark scripts by adding --disable-radix-cache to SGLang server launch commands.

Files changed:

• qwen3.5_bf16_mi300x.sh
• qwen3.5_bf16_mi325x.sh
• qwen3.5_bf16_mi355x.sh
• qwen3.5_fp8_mi300x.sh
• qwen3.5_fp8_mi325x.sh
• qwen3.5_fp8_mi355x.sh
• glm5_fp8_mi355x.sh

Closes #968

Generated with Claude Code

[functionstackx]

@claude resolve the conflicts plz

[Klaud-Cold]

Claude finished @functionstackx's task in 3m 8s —— View job • claude/pr-969-20260328-0807 • Create PR ➔

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Resolving Merge Conflicts

• Analyze current branch state and conflicts
• Re-apply changes on top of current main (resolved conflicts with EVAL_CONTEXT_ARGS removal from Separate eval-only workflow and change to 8k1k #911)
• Push changes

Changes applied to 7 files:

• Removed unused EVAL_CONTEXT_ARGS block (conflicted with Separate eval-only workflow and change to 8k1k #911 which separated eval-only workflow)
• Added --disable-radix-cache to SGLang server launch commands
• Added --concurrent-requests $CONC to run_eval calls

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[claude]

LGTM

Extended reasoning...

Overview\nThis PR adds --disable-radix-cache to 7 AMD benchmark shell scripts (qwen3.5 bf16/fp8 across mi300x/mi325x/mi355x, and glm5 fp8 mi355x). The change is purely additive — one flag appended to SGLang server launch commands in benchmark-only scripts.\n\n### Security Risks\nNone. These are benchmark runner scripts with no auth, crypto, or permission logic.\n\n### Level of Scrutiny\nLow. This is a mechanical, uniform config change across benchmark scripts following the same pattern already established in other scripts (e.g., minimax PR #966, kimi PR #926). No logic changes, no new code paths.\n\n### Other Factors\nNo bugs were found. The change is consistent with prior PRs that disabled prefix caching for other models on AMD hardware. The flag placement (before the redirect) is syntactically correct in all 7 files.