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Sanjeen1/README.md

Hi 👋, I'm Sanjeen Suman

EEE @ SRMIST | VLSI Design @ NITK

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🌐 Socials:

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👨‍💻 About Me:

I am a Electrical Engineer with a good technical knowledge in Digital and Analog Electronics. I enjoy exploring Analog and Digital Circuits, CMOS device performance, Spice simulation, cell characterization and layout design.

💻 Skills:

Synopsys Sentaurus TCAD Cadence Virtuoso Cadence Spectre Intel Quartus Prime Magic VLSI Xilinx Vivado LTspice Ngspice ModelSim Yosys Xschem Netgen OpenROAD OpenSTA OriginPro QuestaSim Device Physics Device Physics Linux

Languages and Software:

arduino cplusplus git linux matlab photoshop python html5 VS Code

📊 GitHub Stats:

GitHub Stats

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  1. VSD-workshop-on-7nm-finfet-characterization- VSD-workshop-on-7nm-finfet-characterization- Public

    This repository contains my work from the VLSI System Design (VSD) Workshop on 7nm FinFET Circuit Design and Characterization using the ASAP7 PDK.

    16

  2. Modeling-of-Dual-GATE-MATERIAL-JUNCTIONLESS-FINFET Modeling-of-Dual-GATE-MATERIAL-JUNCTIONLESS-FINFET Public

    This repository contains the Synopsys Sentaurus TCAD project files, scripts, and simulation setup for modeling a Dual Material Gate Junctionless FinFET (DMG-JLFET). The work includes structure crea…

    3

  3. mosfet-characterization mosfet-characterization Public

    Collection of MOSFET experiments (Id–Vg, Id–Vd, temperature effects and more) simulated in Ngspice for device behavior and VLSI research.

    Python 2

  4. Static-timing-analysis-with-OpenSTA-tool Static-timing-analysis-with-OpenSTA-tool Public

    A complete workflow for performing static timing analysis using the open-source OpenSTA tool on a synthesized digital design. Includes constraint setup (.sdc), open source library file sky130/nanga…

    Verilog 1

  5. 6T-SRAM-Cell-Pre-and-Post-Layout-Simulation 6T-SRAM-Cell-Pre-and-Post-Layout-Simulation Public

    Pre-layout and post-layout simulation of a 6T SRAM cell using open-source EDA tools. This project covers schematic design, SPICE simulation, physical layout in Magic VLSI, parasitic extraction, and…

    1

  6. CMOS-Inverter-Characterization CMOS-Inverter-Characterization Public

    Comprehensive CMOS inverter characterization including VTC, noise margins, delay, rise/fall times, power analysis, and parameter sweeps using NGSpice

    1