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4d84bb6
hw/tpm/tpm_tis_common.c: Assert that locty is in range
pm215 May 25, 2022
e37a0ef
tpm_crb: mark command buffer as dirty on request completion
anthonyper-ctx Apr 11, 2022
6d940ef
Merge tag 'pull-tpm-2022-06-07-1' of https://github.com/stefanberger/…
rth7680 Jun 8, 2022
ec6600b
vfio/common: remove spurious warning on vfio_listener_region_del
eauger May 24, 2022
d507bc3
target/arm: Declare support for FEAT_RASv1p1
pm215 Jun 8, 2022
7ac6102
target/arm: Implement FEAT_DoubleFault
pm215 Jun 8, 2022
9323e79
Fix 'writeable' typos
pm215 Jun 8, 2022
d2008b3
xlnx_dp: fix the wrong register size
fkonrad-amd Jun 8, 2022
759ae1b
xlnx_dp: Introduce a vblank signal
saipava Jun 8, 2022
39f40d0
xlnx_dp: Fix the interrupt disable logic
saipava Jun 8, 2022
b3f5cc3
xlnx-zynqmp: fix the irq mapping for the display port and its dma
fkonrad-amd Jun 8, 2022
d8cca96
target/arm: Move stage_1_mmu_idx decl to internals.h
rth7680 Jun 8, 2022
8ae0886
target/arm: Move get_phys_addr to ptw.c
rth7680 Jun 8, 2022
f2d2f5c
target/arm: Move get_phys_addr_v5 to ptw.c
rth7680 Jun 8, 2022
53c038e
target/arm: Move get_phys_addr_v6 to ptw.c
rth7680 Jun 8, 2022
9a12fb3
target/arm: Move get_phys_addr_pmsav5 to ptw.c
rth7680 Jun 8, 2022
7d2e08c
target/arm: Move get_phys_addr_pmsav7_default to ptw.c
rth7680 Jun 8, 2022
1f2e87e
target/arm: Move get_phys_addr_pmsav7 to ptw.c
rth7680 Jun 8, 2022
730d5c3
target/arm: Move get_phys_addr_pmsav8 to ptw.c
rth7680 Jun 8, 2022
fedbaa0
target/arm: Move pmsav8_mpu_lookup to ptw.c
rth7680 Jun 8, 2022
c8e436c
target/arm: Move pmsav7_use_background_region to ptw.c
rth7680 Jun 8, 2022
2c1f429
target/arm: Move v8m_security_lookup to ptw.c
rth7680 Jun 8, 2022
47ff5ba
target/arm: Move m_is_{ppb,system}_region to ptw.c
rth7680 Jun 8, 2022
4c74ab1
target/arm: Move get_level1_table_address to ptw.c
rth7680 Jun 8, 2022
966f4bb
target/arm: Move combine_cacheattrs and subroutines to ptw.c
rth7680 Jun 8, 2022
3283222
target/arm: Move get_phys_addr_lpae to ptw.c
rth7680 Jun 8, 2022
11552bb
target/arm: Move arm_{ldl,ldq}_ptw to ptw.c
rth7680 Jun 8, 2022
cd6bc4d
target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c
rth7680 Jun 8, 2022
1c73d84
target/arm: Move arm_pamax, pamax_map into ptw.c
rth7680 Jun 8, 2022
f8526ed
target/arm: Move get_S1prot, get_S2prot to ptw.c
rth7680 Jun 8, 2022
c516878
target/arm: Move check_s2_mmu_setup to ptw.c
rth7680 Jun 8, 2022
2f0ec92
target/arm: Move aa32_va_parameters to ptw.c
rth7680 Jun 8, 2022
4845d3b
target/arm: Move ap_to_tw_prot etc to ptw.c
rth7680 Jun 8, 2022
0c23d56
target/arm: Move regime_is_user to ptw.c
rth7680 Jun 8, 2022
3b318aa
target/arm: Move regime_ttbr to ptw.c
rth7680 Jun 8, 2022
8db1a3a
target/arm: Move regime_translation_disabled to ptw.c
rth7680 Jun 8, 2022
2397120
target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c
rth7680 Jun 8, 2022
1d26125
target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c
rth7680 Jun 8, 2022
5e79887
target/arm: Pass CPUARMState to arm_ld[lq]_ptw
rth7680 Jun 8, 2022
f45ce4c
target/arm: Rename TBFLAG_A64 ZCR_LEN to VL
rth7680 Jun 8, 2022
8b599e5
linux-user/aarch64: Introduce sve_vq
rth7680 Jun 8, 2022
61a8c23
target/arm: Remove route_to_el2 check from sve_exception_el
rth7680 Jun 8, 2022
397d922
target/arm: Remove fp checks from sve_exception_el
rth7680 Jun 8, 2022
1966871
target/arm: Add el_is_in_host
rth7680 Jun 8, 2022
c6225be
target/arm: Use el_is_in_host for sve_zcr_len_for_el
rth7680 Jun 8, 2022
aa4451b
target/arm: Use el_is_in_host for sve_exception_el
rth7680 Jun 8, 2022
7d38cb9
target/arm: Hoist arm_is_el2_enabled check in sve_exception_el
rth7680 Jun 8, 2022
87252bd
target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset
rth7680 Jun 8, 2022
9b5f422
target/arm: Merge aarch64_sve_zcr_get_valid_len into caller
rth7680 Jun 8, 2022
886902e
target/arm: Use uint32_t instead of bitmap for sve vq's
rth7680 Jun 8, 2022
5ef3cc5
target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el
rth7680 Jun 8, 2022
d1ce862
target/arm: Split out load/store primitives to sve_ldst_internal.h
rth7680 Jun 8, 2022
0b68112
target/arm: Export sve contiguous ldst support functions
rth7680 Jun 8, 2022
820e0bb
target/arm: Move expand_pred_b to vec_internal.h
rth7680 Jun 8, 2022
05dd14b
target/arm: Use expand_pred_b in mve_helper.c
rth7680 Jun 8, 2022
a613cf2
target/arm: Move expand_pred_h to vec_internal.h
rth7680 Jun 8, 2022
72db2aa
target/arm: Export bfdotadd from vec_helper.c
rth7680 Jun 8, 2022
f305bf9
target/arm: Add isar_feature_aa64_sme
rth7680 Jun 8, 2022
414c54d
target/arm: Add ID_AA64SMFR0_EL1
rth7680 Jun 8, 2022
0591165
Merge tag 'vfio-updates-20220608.0' of https://gitlab.com/alex.willia…
rth7680 Jun 8, 2022
028f236
Merge tag 'pull-target-arm-20220609' of https://git.linaro.org/people…
rth7680 Jun 9, 2022
7851b21
hw/ide/piix: Remove redundant "piix3-ide-xen" device class
shentok May 13, 2022
3690241
hw/ide/piix: Add some documentation to pci_piix3_xen_ide_unplug()
shentok May 13, 2022
6a8a8b6
include/hw/ide: Unexport pci_piix3_xen_ide_unplug()
shentok May 13, 2022
9cc1bf1
Merge tag 'pull-xen-20220609' of https://xenbits.xen.org/git-http/peo…
rth7680 Jun 9, 2022
efe1592
MAINTAINERS: Cover hw/core/uboot_image.h within Generic Loader section
alistair23 May 9, 2022
de799be
target/riscv: add support for zmmul extension v0.1
May 31, 2022
f9a461b
hw/riscv: virt: Generate fw_cfg DT node correctly
atishp04 May 26, 2022
4024404
hw/intc: sifive_plic: Avoid overflowing the addr_config buffer
alistair23 Jun 1, 2022
af97513
hw/core/loader: return image sizes as ssize_t
Nov 11, 2021
8f42415
target/riscv: Wake on VS-level external interrupts
abrestic-rivos May 31, 2022
d1d8541
target/riscv/debug.c: keep experimental rv128 support working
fpetrot Jun 2, 2022
8a085fb
target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed
eopXD Jun 6, 2022
25eae04
target/riscv: rvv: Prune redundant access_type parameter passed
eopXD Jun 6, 2022
c7b8a42
target/riscv: rvv: Rename ambiguous esz
eopXD Jun 6, 2022
41d3d7f
target/riscv: rvv: Early exit when vstart >= vl
eopXD Jun 6, 2022
f1eed92
target/riscv: rvv: Add tail agnostic for vv instructions
Jun 6, 2022
752614c
target/riscv: rvv: Add tail agnostic for vector load / store instruct…
eopXD Jun 6, 2022
5c19fc1
target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions
eopXD Jun 6, 2022
7b1bff4
target/riscv: rvv: Add tail agnostic for vector integer shift instruc…
eopXD Jun 6, 2022
38581e5
target/riscv: rvv: Add tail agnostic for vector integer comparison in…
eopXD Jun 6, 2022
89a32de
target/riscv: rvv: Add tail agnostic for vector integer merge and mov…
eopXD Jun 6, 2022
09106ee
target/riscv: rvv: Add tail agnostic for vector fix-point arithmetic …
eopXD Jun 6, 2022
5eacf7d
target/riscv: rvv: Add tail agnostic for vector floating-point instru…
eopXD Jun 6, 2022
df4f52a
target/riscv: rvv: Add tail agnostic for vector reduction instructions
eopXD Jun 6, 2022
acc6ffd
target/riscv: rvv: Add tail agnostic for vector mask instructions
eopXD Jun 6, 2022
803963f
target/riscv: rvv: Add tail agnostic for vector permutation instructions
eopXD Jun 6, 2022
b831267
target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable optional tail…
Jun 6, 2022
26b2bc5
target/riscv: Don't expose the CPU properties on names CPUs
alistair23 Jun 8, 2022
0731415
target/riscv: trans_rvv: Avoid assert for RV32 and e64
alistair23 Jun 8, 2022
b3cd3b5
Merge tag 'pull-riscv-to-apply-20220610' of github.com:alistair23/qem…
rth7680 Jun 10, 2022
8939206
target/ppc: Add flag for ISA v2.06 BCDA instructions
mferst Apr 4, 2022
0e8b39c
target/ppc: implement addg6s
mferst Apr 4, 2022
972c87e
target/ppc: implement cbcdtd
mferst Apr 4, 2022
7011e24
target/ppc: implement cdtbcd
mferst Apr 4, 2022
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1 change: 1 addition & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -2198,6 +2198,7 @@ Generic Loader
M: Alistair Francis <alistair@alistair23.me>
S: Maintained
F: hw/core/generic-loader.c
F: hw/core/uboot_image.h
F: include/hw/core/generic-loader.h
F: docs/system/generic-loader.rst

Expand Down
4 changes: 2 additions & 2 deletions accel/hvf/hvf-accel-ops.c
Original file line number Diff line number Diff line change
Expand Up @@ -120,12 +120,12 @@ static void hvf_set_phys_mem(MemoryRegionSection *section, bool add)
{
hvf_slot *mem;
MemoryRegion *area = section->mr;
bool writeable = !area->readonly && !area->rom_device;
bool writable = !area->readonly && !area->rom_device;
hv_memory_flags_t flags;
uint64_t page_size = qemu_real_host_page_size();

if (!memory_region_is_ram(area)) {
if (writeable) {
if (writable) {
return;
} else if (!memory_region_is_romd(area)) {
/*
Expand Down
4 changes: 2 additions & 2 deletions accel/kvm/kvm-all.c
Original file line number Diff line number Diff line change
Expand Up @@ -1346,13 +1346,13 @@ static void kvm_set_phys_mem(KVMMemoryListener *kml,
KVMSlot *mem;
int err;
MemoryRegion *mr = section->mr;
bool writeable = !mr->readonly && !mr->rom_device;
bool writable = !mr->readonly && !mr->rom_device;
hwaddr start_addr, size, slot_size, mr_offset;
ram_addr_t ram_start_offset;
void *ram;

if (!memory_region_is_ram(mr)) {
if (writeable || !kvm_readonly_mem_allowed) {
if (writable || !kvm_readonly_mem_allowed) {
return;
} else if (!mr->romd_mode) {
/* If the memory device is not in romd_mode, then we actually want
Expand Down
6 changes: 3 additions & 3 deletions accel/tcg/user-exec.c
Original file line number Diff line number Diff line change
Expand Up @@ -101,10 +101,10 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write)
* Return true if the write fault has been handled, and should be re-tried.
*
* Note that it is important that we don't call page_unprotect() unless
* this is really a "write to nonwriteable page" fault, because
* this is really a "write to nonwritable page" fault, because
* page_unprotect() assumes that if it is called for an access to
* a page that's writeable this means we had two threads racing and
* another thread got there first and already made the page writeable;
* a page that's writable this means we had two threads racing and
* another thread got there first and already made the page writable;
* so we will retry the access. If we were to call page_unprotect()
* for some other kind of fault that should really be passed to the
* guest, we'd end up in an infinite loop of retrying the faulting access.
Expand Down
2 changes: 1 addition & 1 deletion docs/interop/vhost-user.rst
Original file line number Diff line number Diff line change
Expand Up @@ -222,7 +222,7 @@ Virtio device config space
:size: a 32-bit configuration space access size in bytes

:flags: a 32-bit value:
- 0: Vhost front-end messages used for writeable fields
- 0: Vhost front-end messages used for writable fields
- 1: Vhost front-end messages used for live migration

:payload: Size bytes array holding the contents of the virtio
Expand Down
4 changes: 2 additions & 2 deletions docs/specs/vmgenid.txt
Original file line number Diff line number Diff line change
Expand Up @@ -153,7 +153,7 @@ change the contents of the memory at runtime, specifically when starting a
backed-up or snapshotted image. In order to do this, QEMU must know the
address that has been allocated.

The mechanism chosen for this memory sharing is writeable fw_cfg blobs.
The mechanism chosen for this memory sharing is writable fw_cfg blobs.
These are data object that are visible to both QEMU and guests, and are
addressable as sequential files.

Expand All @@ -164,7 +164,7 @@ Two fw_cfg blobs are used in this case:
/etc/vmgenid_guid - contains the actual VM Generation ID GUID
- read-only to the guest
/etc/vmgenid_addr - contains the address of the downloaded vmgenid blob
- writeable by the guest
- writable by the guest


QEMU sends the following commands to the guest at startup:
Expand Down
2 changes: 2 additions & 0 deletions docs/system/arm/emulation.rst
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ the following architecture extensions:
- FEAT_Debugv8p2 (Debug changes for v8.2)
- FEAT_Debugv8p4 (Debug changes for v8.4)
- FEAT_DotProd (Advanced SIMD dot product instructions)
- FEAT_DoubleFault (Double Fault Extension)
- FEAT_FCMA (Floating-point complex number instructions)
- FEAT_FHM (Floating-point half-precision multiplication instructions)
- FEAT_FP16 (Half-precision floating-point data processing)
Expand Down Expand Up @@ -52,6 +53,7 @@ the following architecture extensions:
- FEAT_PMUv3p1 (PMU Extensions v3.1)
- FEAT_PMUv3p4 (PMU Extensions v3.4)
- FEAT_RAS (Reliability, availability, and serviceability)
- FEAT_RASv1p1 (RAS Extension v1.1)
- FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
- FEAT_RNG (Random number generator)
- FEAT_S2FWB (Stage 2 forced Write-Back)
Expand Down
2 changes: 1 addition & 1 deletion hw/acpi/ghes.c
Original file line number Diff line number Diff line change
Expand Up @@ -249,7 +249,7 @@ void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker)
for (i = 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) {
/*
* Initialize the value of read_ack_register to 1, so GHES can be
* writeable after (re)boot.
* writable after (re)boot.
* ACPI 6.2: 18.3.2.8 Generic Hardware Error Source version 2
* (GHESv2 - Type 10)
*/
Expand Down
2 changes: 1 addition & 1 deletion hw/arm/armv7m.c
Original file line number Diff line number Diff line change
Expand Up @@ -570,7 +570,7 @@ static void armv7m_reset(void *opaque)

void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
{
int image_size;
ssize_t image_size;
uint64_t entry;
int big_endian;
AddressSpace *as;
Expand Down
8 changes: 4 additions & 4 deletions hw/arm/boot.c
Original file line number Diff line number Diff line change
Expand Up @@ -881,7 +881,7 @@ static int do_arm_linux_init(Object *obj, void *opaque)
return 0;
}

static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
uint64_t *lowaddr, uint64_t *highaddr,
int elf_machine, AddressSpace *as)
{
Expand All @@ -892,7 +892,7 @@ static int64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,
} elf_header;
int data_swab = 0;
bool big_endian;
int64_t ret = -1;
ssize_t ret = -1;
Error *err = NULL;


Expand Down Expand Up @@ -1014,7 +1014,7 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
/* Set up for a direct boot of a kernel image file. */
CPUState *cs;
AddressSpace *as = arm_boot_address_space(cpu, info);
int kernel_size;
ssize_t kernel_size;
int initrd_size;
int is_linux = 0;
uint64_t elf_entry;
Expand Down Expand Up @@ -1093,7 +1093,7 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,

if (kernel_size > info->ram_size) {
error_report("kernel '%s' is too large to fit in RAM "
"(kernel size %d, RAM size %" PRId64 ")",
"(kernel size %zd, RAM size %" PRId64 ")",
info->kernel_filename, kernel_size, info->ram_size);
exit(1);
}
Expand Down
4 changes: 2 additions & 2 deletions hw/arm/xlnx-zynqmp.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,10 +60,10 @@
#define SERDES_SIZE 0x20000

#define DP_ADDR 0xfd4a0000
#define DP_IRQ 113
#define DP_IRQ 0x77

#define DPDMA_ADDR 0xfd4c0000
#define DPDMA_IRQ 116
#define DPDMA_IRQ 0x7a

#define APU_ADDR 0xfd5c0000
#define APU_IRQ 153
Expand Down
2 changes: 1 addition & 1 deletion hw/core/generic-loader.c
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ static void generic_loader_realize(DeviceState *dev, Error **errp)
GenericLoaderState *s = GENERIC_LOADER(dev);
hwaddr entry;
int big_endian;
int size = 0;
ssize_t size = 0;

s->set_pc = false;

Expand Down
81 changes: 42 additions & 39 deletions hw/core/loader.c
Original file line number Diff line number Diff line change
Expand Up @@ -114,17 +114,17 @@ ssize_t read_targphys(const char *name,
return did;
}

int load_image_targphys(const char *filename,
hwaddr addr, uint64_t max_sz)
ssize_t load_image_targphys(const char *filename,
hwaddr addr, uint64_t max_sz)
{
return load_image_targphys_as(filename, addr, max_sz, NULL);
}

/* return the size or -1 if error */
int load_image_targphys_as(const char *filename,
hwaddr addr, uint64_t max_sz, AddressSpace *as)
ssize_t load_image_targphys_as(const char *filename,
hwaddr addr, uint64_t max_sz, AddressSpace *as)
{
int size;
ssize_t size;

size = get_image_size(filename);
if (size < 0 || size > max_sz) {
Expand All @@ -138,9 +138,9 @@ int load_image_targphys_as(const char *filename,
return size;
}

int load_image_mr(const char *filename, MemoryRegion *mr)
ssize_t load_image_mr(const char *filename, MemoryRegion *mr)
{
int size;
ssize_t size;

if (!memory_access_is_direct(mr, false)) {
/* Can only load an image into RAM or ROM */
Expand Down Expand Up @@ -222,8 +222,8 @@ static void bswap_ahdr(struct exec *e)
: (_N_SEGMENT_ROUND (_N_TXTENDADDR(x, target_page_size), target_page_size)))


int load_aout(const char *filename, hwaddr addr, int max_sz,
int bswap_needed, hwaddr target_page_size)
ssize_t load_aout(const char *filename, hwaddr addr, int max_sz,
int bswap_needed, hwaddr target_page_size)
{
int fd;
ssize_t size, ret;
Expand Down Expand Up @@ -617,13 +617,14 @@ ssize_t gunzip(void *dst, size_t dstlen, uint8_t *src, size_t srclen)
}

/* Load a U-Boot image. */
static int load_uboot_image(const char *filename, hwaddr *ep, hwaddr *loadaddr,
int *is_linux, uint8_t image_type,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, AddressSpace *as)
static ssize_t load_uboot_image(const char *filename, hwaddr *ep,
hwaddr *loadaddr, int *is_linux,
uint8_t image_type,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, AddressSpace *as)
{
int fd;
int size;
ssize_t size;
hwaddr address;
uboot_image_header_t h;
uboot_image_header_t *hdr = &h;
Expand Down Expand Up @@ -760,40 +761,40 @@ static int load_uboot_image(const char *filename, hwaddr *ep, hwaddr *loadaddr,
return ret;
}

int load_uimage(const char *filename, hwaddr *ep, hwaddr *loadaddr,
int *is_linux,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque)
ssize_t load_uimage(const char *filename, hwaddr *ep, hwaddr *loadaddr,
int *is_linux,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque)
{
return load_uboot_image(filename, ep, loadaddr, is_linux, IH_TYPE_KERNEL,
translate_fn, translate_opaque, NULL);
}

int load_uimage_as(const char *filename, hwaddr *ep, hwaddr *loadaddr,
int *is_linux,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, AddressSpace *as)
ssize_t load_uimage_as(const char *filename, hwaddr *ep, hwaddr *loadaddr,
int *is_linux,
uint64_t (*translate_fn)(void *, uint64_t),
void *translate_opaque, AddressSpace *as)
{
return load_uboot_image(filename, ep, loadaddr, is_linux, IH_TYPE_KERNEL,
translate_fn, translate_opaque, as);
}

/* Load a ramdisk. */
int load_ramdisk(const char *filename, hwaddr addr, uint64_t max_sz)
ssize_t load_ramdisk(const char *filename, hwaddr addr, uint64_t max_sz)
{
return load_ramdisk_as(filename, addr, max_sz, NULL);
}

int load_ramdisk_as(const char *filename, hwaddr addr, uint64_t max_sz,
AddressSpace *as)
ssize_t load_ramdisk_as(const char *filename, hwaddr addr, uint64_t max_sz,
AddressSpace *as)
{
return load_uboot_image(filename, NULL, &addr, NULL, IH_TYPE_RAMDISK,
NULL, NULL, as);
}

/* Load a gzip-compressed kernel to a dynamically allocated buffer. */
int load_image_gzipped_buffer(const char *filename, uint64_t max_sz,
uint8_t **buffer)
ssize_t load_image_gzipped_buffer(const char *filename, uint64_t max_sz,
uint8_t **buffer)
{
uint8_t *compressed_data = NULL;
uint8_t *data = NULL;
Expand Down Expand Up @@ -838,9 +839,9 @@ int load_image_gzipped_buffer(const char *filename, uint64_t max_sz,
}

/* Load a gzip-compressed kernel. */
int load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz)
ssize_t load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz)
{
int bytes;
ssize_t bytes;
uint8_t *data;

bytes = load_image_gzipped_buffer(filename, max_sz, &data);
Expand Down Expand Up @@ -970,14 +971,15 @@ static void *rom_set_mr(Rom *rom, Object *owner, const char *name, bool ro)
return data;
}

int rom_add_file(const char *file, const char *fw_dir,
hwaddr addr, int32_t bootindex,
bool option_rom, MemoryRegion *mr,
AddressSpace *as)
ssize_t rom_add_file(const char *file, const char *fw_dir,
hwaddr addr, int32_t bootindex,
bool option_rom, MemoryRegion *mr,
AddressSpace *as)
{
MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
Rom *rom;
int rc, fd = -1;
ssize_t rc;
int fd = -1;
char devpath[100];

if (as && mr) {
Expand Down Expand Up @@ -1019,7 +1021,7 @@ int rom_add_file(const char *file, const char *fw_dir,
lseek(fd, 0, SEEK_SET);
rc = read(fd, rom->data, rom->datasize);
if (rc != rom->datasize) {
fprintf(stderr, "rom: file %-20s: read error: rc=%d (expected %zd)\n",
fprintf(stderr, "rom: file %-20s: read error: rc=%zd (expected %zd)\n",
rom->name, rc, rom->datasize);
goto err;
}
Expand Down Expand Up @@ -1138,12 +1140,12 @@ int rom_add_elf_program(const char *name, GMappedFile *mapped_file, void *data,
return 0;
}

int rom_add_vga(const char *file)
ssize_t rom_add_vga(const char *file)
{
return rom_add_file(file, "vgaroms", 0, -1, true, NULL, NULL);
}

int rom_add_option(const char *file, int32_t bootindex)
ssize_t rom_add_option(const char *file, int32_t bootindex)
{
return rom_add_file(file, "genroms", 0, bootindex, true, NULL, NULL);
}
Expand Down Expand Up @@ -1846,11 +1848,12 @@ static int parse_hex_blob(const char *filename, hwaddr *addr, uint8_t *hex_blob,
}

/* return size or -1 if error */
int load_targphys_hex_as(const char *filename, hwaddr *entry, AddressSpace *as)
ssize_t load_targphys_hex_as(const char *filename, hwaddr *entry,
AddressSpace *as)
{
gsize hex_blob_size;
gchar *hex_blob;
int total_size = 0;
ssize_t total_size = 0;

if (!g_file_get_contents(filename, &hex_blob, &hex_blob_size, NULL)) {
return -1;
Expand Down
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