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At its core, the RFBuilder framework is an interconnected fabric of carefully crafted RF 'blocks' that can synthesise and process very-high bandwidth data. The RFBuilder Python library allows you to instantiate and connect these blocks into completely custom topologies, allowing you to reconfigure the underlying hardware without any HDL or FPGA design knowledge. The system blocks themselves are broken up into 3 categories, which are classified by their behaviour:
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Source Blocks: A source block is one that only outputs data that is then available to other blocks. Some examples of source blocks include Analog-to-Digital Converters (ADCs) and Arbitrary Waveform Generators.
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Sink Blocks: A sink block is one that only inputs data that is then handled by some system. Currently, the only two sink blocks are the Digital-to-Analog Converters (DACs) and the Data Logger.
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Processing Blocks: A processing block is one that will input a stream of data, alter that stream in some way, and then output it again to be available to other blocks. Some examples of processing blocks include an FIR filter or Gain / Attenuation Blocks
These blocks all then connect together to create your bespoke test and measurement toolchains. For example, a simple oscilloscope could be constructed by connecting an ADC block to a Data logger block, which would then capture samples and relay them back to your Python interface. Likewise, an AWG can be constructed by piping the AWG blocks' output straight out of a DAC. If you want a simple filter, you can input data from the ADC Block, connect it to the FIR Filter and then feed it back out to a DAC. The possibilities of these combinations are endless.
Take a look at Getting Started, to begin using RFBuilder.