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8 changes: 5 additions & 3 deletions src/cpu/operators/CpuGemmConv2d.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021-2025 Arm Limited.
* Copyright (c) 2021-2026 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
Expand Down Expand Up @@ -185,8 +185,10 @@ CpuGemmConv2d::SkipInfo CpuGemmConv2d::skip_im_col_info(const ITensorInfo
unsigned int conv_h = 0;
std::tie(conv_w, conv_h) = scaled_dimensions(src->dimension(idx_width), src->dimension(idx_height), kernel_width,
kernel_height, conv_info, dilation);
const bool skip_im2col = (data_layout == DataLayout::NHWC && kernel_width == 1 && kernel_height == 1 &&
conv_info.stride().first == 1 && conv_info.stride().second == 1);

const bool skip_im2col = (data_layout == DataLayout::NHWC && kernel_width == 1 && kernel_height == 1 &&
conv_info.stride().first == 1 && conv_info.stride().second == 1) &&
!conv_info.has_padding();

if (skip_im2col)
{
Expand Down
4 changes: 3 additions & 1 deletion tests/datasets/SmallConvolutionLayerDataset.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2021, 2025 Arm Limited.
* Copyright (c) 2017-2021, 2025-2026 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
Expand Down Expand Up @@ -181,6 +181,8 @@ class SmallConvolutionLayerDataset final : public ConvolutionLayerDataset
// 1x1 Kernel with Stride (1, 1) and NHWC data layout in order to test skipping Im2Col
add_config(TensorShape(1U, 5U, 2U), TensorShape(1U, 1U, 2U, 3U), TensorShape(3U), TensorShape(1U, 5U, 3U),
PadStrideInfo(1, 1, 0, 0));
add_config(TensorShape(1U, 5U, 2U), TensorShape(1U, 1U, 2U, 3U), TensorShape(3U), TensorShape(3U, 7U, 3U),
PadStrideInfo(1, 1, 1, 1));

// Batch size 1
add_config(TensorShape(23U, 27U, 5U), TensorShape(3U, 3U, 5U, 2U), TensorShape(2U), TensorShape(11U, 25U, 2U),
Expand Down