Add another ArrowLake MCH ID

Author: jackpot51

src/include/device/pci_ids.h

@@ -4431,7 +4431,8 @@
 #define PCI_DID_INTEL_MTL_P_ID_3		0x7d14
 #define PCI_DID_INTEL_MTL_P_ID_4		0x7d15
 #define PCI_DID_INTEL_MTL_P_ID_5		0x7d16
-#define PCI_DID_INTEL_ARL_H_ID  		0x7d20
+#define PCI_DID_INTEL_ARL_H_ID_1  		0x7d06
+#define PCI_DID_INTEL_ARL_H_ID_2  		0x7d20
 #define PCI_DID_INTEL_RPL_HX_ID_1		0xa702
 #define PCI_DID_INTEL_RPL_HX_ID_2		0xa729
 #define PCI_DID_INTEL_RPL_HX_ID_3		0xa728

src/soc/intel/meteorlake/bootblock/report_platform.c

@@ -35,7 +35,8 @@ static struct {
 	{ PCI_DID_INTEL_MTL_P_ID_3, "MeteorLake P" },
 	{ PCI_DID_INTEL_MTL_P_ID_4, "MeteorLake P" },
 	{ PCI_DID_INTEL_MTL_P_ID_5, "MeteorLake P" },
-	{ PCI_DID_INTEL_ARL_H_ID, "ArrowLake-H" },
+	{ PCI_DID_INTEL_ARL_H_ID_1, "ArrowLake-H" },
+	{ PCI_DID_INTEL_ARL_H_ID_2, "ArrowLake-H" },
 };
 
 static struct {

src/soc/intel/meteorlake/chip.h

@@ -65,7 +65,8 @@ static const struct {
 	{ PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_242_CORE, TDP_15W },
 	{ PCI_DID_INTEL_MTL_P_ID_3, MTL_P_682_482_CORE, TDP_28W },
 	{ PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_482_CORE, TDP_28W },
-	{ PCI_DID_INTEL_ARL_H_ID, MTL_P_682_482_CORE, TDP_28W },
+	{ PCI_DID_INTEL_ARL_H_ID_1, MTL_P_682_482_CORE, TDP_28W },
+	{ PCI_DID_INTEL_ARL_H_ID_2, MTL_P_682_482_CORE, TDP_28W },
 };
 
 /* Types of display ports */