firmware.lst

.pio\build\uno\firmware.elf:     file format elf32-avr


Disassembly of section .text:

00000000 <__vectors>:
   0:	0c 94 66 00 	jmp	0xcc	; 0xcc <__ctors_end>
   4:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
   8:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
   c:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  10:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  14:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  18:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  1c:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  20:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  24:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  28:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  2c:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  30:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  34:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  38:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  3c:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  40:	0c 94 c0 06 	jmp	0xd80	; 0xd80 <__vector_16>
  44:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  48:	0c 94 51 07 	jmp	0xea2	; 0xea2 <__vector_18>
  4c:	0c 94 2b 07 	jmp	0xe56	; 0xe56 <__vector_19>
  50:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  54:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  58:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  5c:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  60:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>
  64:	0c 94 8e 00 	jmp	0x11c	; 0x11c <__bad_interrupt>

00000068 <__trampolines_end>:
  68:	49 6e       	ori	r20, 0xE9	; 233
  6a:	76 61       	ori	r23, 0x16	; 22
  6c:	6c 69       	ori	r22, 0x9C	; 156
  6e:	64 20       	and	r6, r4
  70:	63 6f       	ori	r22, 0xF3	; 243
  72:	6d 6d       	ori	r22, 0xDD	; 221
  74:	61 6e       	ori	r22, 0xE1	; 225
  76:	64 3a       	cpi	r22, 0xA4	; 164
  78:	20 00       	.word	0x0020	; ????

0000007a <port_to_mode_PGM>:
  7a:	00 00 00 00 24 00 27 00 2a 00                       ....$.'.*.

00000084 <port_to_output_PGM>:
  84:	00 00 00 00 25 00 28 00 2b 00                       ....%.(.+.

0000008e <digital_pin_to_port_PGM>:
  8e:	04 04 04 04 04 04 04 04 02 02 02 02 02 02 03 03     ................
  9e:	03 03 03 03                                         ....

000000a2 <digital_pin_to_bit_mask_PGM>:
  a2:	01 02 04 08 10 20 40 80 01 02 04 08 10 20 01 02     ..... @...... ..
  b2:	04 08 10 20                                         ... 

000000b6 <digital_pin_to_timer_PGM>:
  b6:	00 00 00 08 00 02 01 00 00 03 04 07 00 00 00 00     ................
  c6:	00 00 00 00                                         ....

000000ca <__ctors_start>:
  ca:	24 07       	cpc	r18, r20

000000cc <__ctors_end>:
  cc:	11 24       	eor	r1, r1
  ce:	1f be       	out	0x3f, r1	; 63
  d0:	cf ef       	ldi	r28, 0xFF	; 255
  d2:	d8 e0       	ldi	r29, 0x08	; 8
  d4:	de bf       	out	0x3e, r29	; 62
  d6:	cd bf       	out	0x3d, r28	; 61

000000d8 <__do_copy_data>:
  d8:	11 e0       	ldi	r17, 0x01	; 1
  da:	a0 e0       	ldi	r26, 0x00	; 0
  dc:	b1 e0       	ldi	r27, 0x01	; 1
  de:	e6 e6       	ldi	r30, 0x66	; 102
  e0:	ff e0       	ldi	r31, 0x0F	; 15
  e2:	02 c0       	rjmp	.+4      	; 0xe8 <__do_copy_data+0x10>
  e4:	05 90       	lpm	r0, Z+
  e6:	0d 92       	st	X+, r0
  e8:	a0 32       	cpi	r26, 0x20	; 32
  ea:	b1 07       	cpc	r27, r17
  ec:	d9 f7       	brne	.-10     	; 0xe4 <__do_copy_data+0xc>

000000ee <__do_clear_bss>:
  ee:	22 e0       	ldi	r18, 0x02	; 2
  f0:	a0 e2       	ldi	r26, 0x20	; 32
  f2:	b1 e0       	ldi	r27, 0x01	; 1
  f4:	01 c0       	rjmp	.+2      	; 0xf8 <.do_clear_bss_start>

000000f6 <.do_clear_bss_loop>:
  f6:	1d 92       	st	X+, r1

000000f8 <.do_clear_bss_start>:
  f8:	a0 31       	cpi	r26, 0x10	; 16
  fa:	b2 07       	cpc	r27, r18
  fc:	e1 f7       	brne	.-8      	; 0xf6 <.do_clear_bss_loop>

000000fe <__do_global_ctors>:
  fe:	10 e0       	ldi	r17, 0x00	; 0
 100:	c6 e6       	ldi	r28, 0x66	; 102
 102:	d0 e0       	ldi	r29, 0x00	; 0
 104:	04 c0       	rjmp	.+8      	; 0x10e <__do_global_ctors+0x10>
 106:	21 97       	sbiw	r28, 0x01	; 1
 108:	fe 01       	movw	r30, r28
 10a:	0e 94 ab 07 	call	0xf56	; 0xf56 <__tablejump2__>
 10e:	c5 36       	cpi	r28, 0x65	; 101
 110:	d1 07       	cpc	r29, r17
 112:	c9 f7       	brne	.-14     	; 0x106 <__do_global_ctors+0x8>
 114:	0e 94 1b 07 	call	0xe36	; 0xe36 <main>
 118:	0c 94 b1 07 	jmp	0xf62	; 0xf62 <_exit>

0000011c <__bad_interrupt>:
 11c:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

00000120 <__empty>:
 * Its defined as a weak symbol and it can be redefined to implement a
 * real cooperative scheduler.
 */
static void __empty() {
	// Empty
}
 120:	08 95       	ret

00000122 <turnOffPWM>:
//
//static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
//static inline void turnOffPWM(uint8_t timer)
static void turnOffPWM(uint8_t timer)
{
	switch (timer)
 122:	83 30       	cpi	r24, 0x03	; 3
 124:	b1 f0       	breq	.+44     	; 0x152 <turnOffPWM+0x30>
 126:	60 f0       	brcs	.+24     	; 0x140 <turnOffPWM+0x1e>
 128:	87 30       	cpi	r24, 0x07	; 7
 12a:	e9 f0       	breq	.+58     	; 0x166 <turnOffPWM+0x44>
 12c:	88 30       	cpi	r24, 0x08	; 8
 12e:	09 f1       	breq	.+66     	; 0x172 <turnOffPWM+0x50>
 130:	84 30       	cpi	r24, 0x04	; 4
 132:	21 f5       	brne	.+72     	; 0x17c <turnOffPWM+0x5a>
	{
		#if defined(TCCR1A) && defined(COM1A1)
		case TIMER1A:   cbi(TCCR1A, COM1A1);    break;
		#endif
		#if defined(TCCR1A) && defined(COM1B1)
		case TIMER1B:   cbi(TCCR1A, COM1B1);    break;
 134:	e0 e8       	ldi	r30, 0x80	; 128
 136:	f0 e0       	ldi	r31, 0x00	; 0
 138:	80 81       	ld	r24, Z
 13a:	8f 7d       	andi	r24, 0xDF	; 223
 13c:	80 83       	st	Z, r24
 13e:	08 95       	ret
//
//static inline void turnOffPWM(uint8_t timer) __attribute__ ((always_inline));
//static inline void turnOffPWM(uint8_t timer)
static void turnOffPWM(uint8_t timer)
{
	switch (timer)
 140:	81 30       	cpi	r24, 0x01	; 1
 142:	69 f0       	breq	.+26     	; 0x15e <turnOffPWM+0x3c>
 144:	82 30       	cpi	r24, 0x02	; 2
 146:	21 f4       	brne	.+8      	; 0x150 <turnOffPWM+0x2e>
		#if defined(TCCR0A) && defined(COM0A1)
		case  TIMER0A:  cbi(TCCR0A, COM0A1);    break;
		#endif
		
		#if defined(TCCR0A) && defined(COM0B1)
		case  TIMER0B:  cbi(TCCR0A, COM0B1);    break;
 148:	84 b5       	in	r24, 0x24	; 36
 14a:	8f 7d       	andi	r24, 0xDF	; 223
 14c:	84 bd       	out	0x24, r24	; 36
 14e:	08 95       	ret
 150:	08 95       	ret
static void turnOffPWM(uint8_t timer)
{
	switch (timer)
	{
		#if defined(TCCR1A) && defined(COM1A1)
		case TIMER1A:   cbi(TCCR1A, COM1A1);    break;
 152:	e0 e8       	ldi	r30, 0x80	; 128
 154:	f0 e0       	ldi	r31, 0x00	; 0
 156:	80 81       	ld	r24, Z
 158:	8f 77       	andi	r24, 0x7F	; 127
 15a:	80 83       	st	Z, r24
 15c:	08 95       	ret
		#if defined(TCCR2) && defined(COM21)
		case  TIMER2:   cbi(TCCR2, COM21);      break;
		#endif
		
		#if defined(TCCR0A) && defined(COM0A1)
		case  TIMER0A:  cbi(TCCR0A, COM0A1);    break;
 15e:	84 b5       	in	r24, 0x24	; 36
 160:	8f 77       	andi	r24, 0x7F	; 127
 162:	84 bd       	out	0x24, r24	; 36
 164:	08 95       	ret
		
		#if defined(TCCR0A) && defined(COM0B1)
		case  TIMER0B:  cbi(TCCR0A, COM0B1);    break;
		#endif
		#if defined(TCCR2A) && defined(COM2A1)
		case  TIMER2A:  cbi(TCCR2A, COM2A1);    break;
 166:	e0 eb       	ldi	r30, 0xB0	; 176
 168:	f0 e0       	ldi	r31, 0x00	; 0
 16a:	80 81       	ld	r24, Z
 16c:	8f 77       	andi	r24, 0x7F	; 127
 16e:	80 83       	st	Z, r24
 170:	08 95       	ret
		#endif
		#if defined(TCCR2A) && defined(COM2B1)
		case  TIMER2B:  cbi(TCCR2A, COM2B1);    break;
 172:	e0 eb       	ldi	r30, 0xB0	; 176
 174:	f0 e0       	ldi	r31, 0x00	; 0
 176:	80 81       	ld	r24, Z
 178:	8f 7d       	andi	r24, 0xDF	; 223
 17a:	80 83       	st	Z, r24
		case  TIMER5A:  cbi(TCCR5A, COM5A1);    break;
		case  TIMER5B:  cbi(TCCR5A, COM5B1);    break;
		case  TIMER5C:  cbi(TCCR5A, COM5C1);    break;
		#endif
	}
}
 17c:	08 95       	ret

0000017e <digitalWrite>:

void digitalWrite(uint8_t pin, uint8_t val)
{
 17e:	1f 93       	push	r17
 180:	cf 93       	push	r28
 182:	df 93       	push	r29
	uint8_t timer = digitalPinToTimer(pin);
 184:	28 2f       	mov	r18, r24
 186:	30 e0       	ldi	r19, 0x00	; 0
 188:	f9 01       	movw	r30, r18
 18a:	ea 54       	subi	r30, 0x4A	; 74
 18c:	ff 4f       	sbci	r31, 0xFF	; 255
 18e:	84 91       	lpm	r24, Z
	uint8_t bit = digitalPinToBitMask(pin);
 190:	f9 01       	movw	r30, r18
 192:	ee 55       	subi	r30, 0x5E	; 94
 194:	ff 4f       	sbci	r31, 0xFF	; 255
 196:	14 91       	lpm	r17, Z
	uint8_t port = digitalPinToPort(pin);
 198:	f9 01       	movw	r30, r18
 19a:	e2 57       	subi	r30, 0x72	; 114
 19c:	ff 4f       	sbci	r31, 0xFF	; 255
 19e:	c4 91       	lpm	r28, Z
	volatile uint8_t *out;

	if (port == NOT_A_PIN) return;
 1a0:	cc 23       	and	r28, r28
 1a2:	a9 f0       	breq	.+42     	; 0x1ce <digitalWrite+0x50>
 1a4:	d6 2f       	mov	r29, r22

	// If the pin that support PWM output, we need to turn it off
	// before doing a digital write.
	if (timer != NOT_ON_TIMER) turnOffPWM(timer);
 1a6:	81 11       	cpse	r24, r1
 1a8:	16 c0       	rjmp	.+44     	; 0x1d6 <digitalWrite+0x58>

	out = portOutputRegister(port);
 1aa:	ec 2f       	mov	r30, r28
 1ac:	f0 e0       	ldi	r31, 0x00	; 0
 1ae:	ee 0f       	add	r30, r30
 1b0:	ff 1f       	adc	r31, r31
 1b2:	ec 57       	subi	r30, 0x7C	; 124
 1b4:	ff 4f       	sbci	r31, 0xFF	; 255
 1b6:	a5 91       	lpm	r26, Z+
 1b8:	b4 91       	lpm	r27, Z

	uint8_t oldSREG = SREG;
 1ba:	8f b7       	in	r24, 0x3f	; 63
	cli();
 1bc:	f8 94       	cli

	if (val == LOW) {
 1be:	d1 11       	cpse	r29, r1
 1c0:	0d c0       	rjmp	.+26     	; 0x1dc <digitalWrite+0x5e>
		*out &= ~bit;
 1c2:	9c 91       	ld	r25, X
 1c4:	e1 2f       	mov	r30, r17
 1c6:	e0 95       	com	r30
 1c8:	e9 23       	and	r30, r25
 1ca:	ec 93       	st	X, r30
	} else {
		*out |= bit;
	}

	SREG = oldSREG;
 1cc:	8f bf       	out	0x3f, r24	; 63
}
 1ce:	df 91       	pop	r29
 1d0:	cf 91       	pop	r28
 1d2:	1f 91       	pop	r17
 1d4:	08 95       	ret

	if (port == NOT_A_PIN) return;

	// If the pin that support PWM output, we need to turn it off
	// before doing a digital write.
	if (timer != NOT_ON_TIMER) turnOffPWM(timer);
 1d6:	0e 94 91 00 	call	0x122	; 0x122 <turnOffPWM>
 1da:	e7 cf       	rjmp	.-50     	; 0x1aa <digitalWrite+0x2c>
	cli();

	if (val == LOW) {
		*out &= ~bit;
	} else {
		*out |= bit;
 1dc:	ec 91       	ld	r30, X
 1de:	e1 2b       	or	r30, r17
 1e0:	ec 93       	st	X, r30
 1e2:	f4 cf       	rjmp	.-24     	; 0x1cc <digitalWrite+0x4e>

000001e4 <pinMode>:
#define ARDUINO_MAIN
#include "wiring_private.h"
#include "pins_arduino.h"

void pinMode(uint8_t pin, uint8_t mode)
{
 1e4:	cf 93       	push	r28
 1e6:	df 93       	push	r29
	uint8_t bit = digitalPinToBitMask(pin);
 1e8:	90 e0       	ldi	r25, 0x00	; 0
 1ea:	fc 01       	movw	r30, r24
 1ec:	ee 55       	subi	r30, 0x5E	; 94
 1ee:	ff 4f       	sbci	r31, 0xFF	; 255
 1f0:	24 91       	lpm	r18, Z
	uint8_t port = digitalPinToPort(pin);
 1f2:	82 57       	subi	r24, 0x72	; 114
 1f4:	9f 4f       	sbci	r25, 0xFF	; 255
 1f6:	fc 01       	movw	r30, r24
 1f8:	84 91       	lpm	r24, Z
	volatile uint8_t *reg, *out;

	if (port == NOT_A_PIN) return;
 1fa:	88 23       	and	r24, r24
 1fc:	19 f1       	breq	.+70     	; 0x244 <pinMode+0x60>

	// JWS: can I let the optimizer do this?
	reg = portModeRegister(port);
 1fe:	90 e0       	ldi	r25, 0x00	; 0
 200:	88 0f       	add	r24, r24
 202:	99 1f       	adc	r25, r25
 204:	fc 01       	movw	r30, r24
 206:	e6 58       	subi	r30, 0x86	; 134
 208:	ff 4f       	sbci	r31, 0xFF	; 255
 20a:	a5 91       	lpm	r26, Z+
 20c:	b4 91       	lpm	r27, Z
	out = portOutputRegister(port);
 20e:	fc 01       	movw	r30, r24
 210:	ec 57       	subi	r30, 0x7C	; 124
 212:	ff 4f       	sbci	r31, 0xFF	; 255
 214:	c5 91       	lpm	r28, Z+
 216:	d4 91       	lpm	r29, Z

	if (mode == INPUT) { 
 218:	66 23       	and	r22, r22
 21a:	49 f0       	breq	.+18     	; 0x22e <pinMode+0x4a>
		uint8_t oldSREG = SREG;
                cli();
		*reg &= ~bit;
		*out &= ~bit;
		SREG = oldSREG;
	} else if (mode == INPUT_PULLUP) {
 21c:	62 30       	cpi	r22, 0x02	; 2
 21e:	a9 f0       	breq	.+42     	; 0x24a <pinMode+0x66>
                cli();
		*reg &= ~bit;
		*out |= bit;
		SREG = oldSREG;
	} else {
		uint8_t oldSREG = SREG;
 220:	8f b7       	in	r24, 0x3f	; 63
                cli();
 222:	f8 94       	cli
		*reg |= bit;
 224:	ec 91       	ld	r30, X
 226:	e2 2b       	or	r30, r18
 228:	ec 93       	st	X, r30
		SREG = oldSREG;
 22a:	8f bf       	out	0x3f, r24	; 63
 22c:	0b c0       	rjmp	.+22     	; 0x244 <pinMode+0x60>
	// JWS: can I let the optimizer do this?
	reg = portModeRegister(port);
	out = portOutputRegister(port);

	if (mode == INPUT) { 
		uint8_t oldSREG = SREG;
 22e:	9f b7       	in	r25, 0x3f	; 63
                cli();
 230:	f8 94       	cli
		*reg &= ~bit;
 232:	8c 91       	ld	r24, X
 234:	e2 2f       	mov	r30, r18
 236:	e0 95       	com	r30
 238:	8e 23       	and	r24, r30
 23a:	8c 93       	st	X, r24
		*out &= ~bit;
 23c:	88 81       	ld	r24, Y
 23e:	e8 23       	and	r30, r24
 240:	e8 83       	st	Y, r30
		SREG = oldSREG;
 242:	9f bf       	out	0x3f, r25	; 63
		uint8_t oldSREG = SREG;
                cli();
		*reg |= bit;
		SREG = oldSREG;
	}
}
 244:	df 91       	pop	r29
 246:	cf 91       	pop	r28
 248:	08 95       	ret
                cli();
		*reg &= ~bit;
		*out &= ~bit;
		SREG = oldSREG;
	} else if (mode == INPUT_PULLUP) {
		uint8_t oldSREG = SREG;
 24a:	9f b7       	in	r25, 0x3f	; 63
                cli();
 24c:	f8 94       	cli
		*reg &= ~bit;
 24e:	3c 91       	ld	r19, X
 250:	82 2f       	mov	r24, r18
 252:	80 95       	com	r24
 254:	83 23       	and	r24, r19
 256:	8c 93       	st	X, r24
		*out |= bit;
 258:	e8 81       	ld	r30, Y
 25a:	e2 2b       	or	r30, r18
 25c:	e8 83       	st	Y, r30
		SREG = oldSREG;
 25e:	9f bf       	out	0x3f, r25	; 63
 260:	f1 cf       	rjmp	.-30     	; 0x244 <pinMode+0x60>

00000262 <init>:

void init()
{
	// this needs to be called before setup() or some functions won't
	// work there
	sei();
 262:	78 94       	sei
	
	// on the ATmega168, timer 0 is also used for fast hardware pwm
	// (using phase-correct PWM would mean that timer 0 overflowed half as often
	// resulting in different millis() behavior on the ATmega8 and ATmega168)
#if defined(TCCR0A) && defined(WGM01)
	sbi(TCCR0A, WGM01);
 264:	84 b5       	in	r24, 0x24	; 36
 266:	82 60       	ori	r24, 0x02	; 2
 268:	84 bd       	out	0x24, r24	; 36
	sbi(TCCR0A, WGM00);
 26a:	84 b5       	in	r24, 0x24	; 36
 26c:	81 60       	ori	r24, 0x01	; 1
 26e:	84 bd       	out	0x24, r24	; 36
	// this combination is for the standard atmega8
	sbi(TCCR0, CS01);
	sbi(TCCR0, CS00);
#elif defined(TCCR0B) && defined(CS01) && defined(CS00)
	// this combination is for the standard 168/328/1280/2560
	sbi(TCCR0B, CS01);
 270:	85 b5       	in	r24, 0x25	; 37
 272:	82 60       	ori	r24, 0x02	; 2
 274:	85 bd       	out	0x25, r24	; 37
	sbi(TCCR0B, CS00);
 276:	85 b5       	in	r24, 0x25	; 37
 278:	81 60       	ori	r24, 0x01	; 1
 27a:	85 bd       	out	0x25, r24	; 37

	// enable timer 0 overflow interrupt
#if defined(TIMSK) && defined(TOIE0)
	sbi(TIMSK, TOIE0);
#elif defined(TIMSK0) && defined(TOIE0)
	sbi(TIMSK0, TOIE0);
 27c:	ee e6       	ldi	r30, 0x6E	; 110
 27e:	f0 e0       	ldi	r31, 0x00	; 0
 280:	80 81       	ld	r24, Z
 282:	81 60       	ori	r24, 0x01	; 1
 284:	80 83       	st	Z, r24
	// this is better for motors as it ensures an even waveform
	// note, however, that fast pwm mode can achieve a frequency of up
	// 8 MHz (with a 16 MHz clock) at 50% duty cycle

#if defined(TCCR1B) && defined(CS11) && defined(CS10)
	TCCR1B = 0;
 286:	e1 e8       	ldi	r30, 0x81	; 129
 288:	f0 e0       	ldi	r31, 0x00	; 0
 28a:	10 82       	st	Z, r1

	// set timer 1 prescale factor to 64
	sbi(TCCR1B, CS11);
 28c:	80 81       	ld	r24, Z
 28e:	82 60       	ori	r24, 0x02	; 2
 290:	80 83       	st	Z, r24
#if F_CPU >= 8000000L
	sbi(TCCR1B, CS10);
 292:	80 81       	ld	r24, Z
 294:	81 60       	ori	r24, 0x01	; 1
 296:	80 83       	st	Z, r24
	sbi(TCCR1, CS10);
#endif
#endif
	// put timer 1 in 8-bit phase correct pwm mode
#if defined(TCCR1A) && defined(WGM10)
	sbi(TCCR1A, WGM10);
 298:	e0 e8       	ldi	r30, 0x80	; 128
 29a:	f0 e0       	ldi	r31, 0x00	; 0
 29c:	80 81       	ld	r24, Z
 29e:	81 60       	ori	r24, 0x01	; 1
 2a0:	80 83       	st	Z, r24

	// set timer 2 prescale factor to 64
#if defined(TCCR2) && defined(CS22)
	sbi(TCCR2, CS22);
#elif defined(TCCR2B) && defined(CS22)
	sbi(TCCR2B, CS22);
 2a2:	e1 eb       	ldi	r30, 0xB1	; 177
 2a4:	f0 e0       	ldi	r31, 0x00	; 0
 2a6:	80 81       	ld	r24, Z
 2a8:	84 60       	ori	r24, 0x04	; 4
 2aa:	80 83       	st	Z, r24

	// configure timer 2 for phase correct pwm (8-bit)
#if defined(TCCR2) && defined(WGM20)
	sbi(TCCR2, WGM20);
#elif defined(TCCR2A) && defined(WGM20)
	sbi(TCCR2A, WGM20);
 2ac:	e0 eb       	ldi	r30, 0xB0	; 176
 2ae:	f0 e0       	ldi	r31, 0x00	; 0
 2b0:	80 81       	ld	r24, Z
 2b2:	81 60       	ori	r24, 0x01	; 1
 2b4:	80 83       	st	Z, r24
#endif

#if defined(ADCSRA)
	// set a2d prescaler so we are inside the desired 50-200 KHz range.
	#if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz
		sbi(ADCSRA, ADPS2);
 2b6:	ea e7       	ldi	r30, 0x7A	; 122
 2b8:	f0 e0       	ldi	r31, 0x00	; 0
 2ba:	80 81       	ld	r24, Z
 2bc:	84 60       	ori	r24, 0x04	; 4
 2be:	80 83       	st	Z, r24
		sbi(ADCSRA, ADPS1);
 2c0:	80 81       	ld	r24, Z
 2c2:	82 60       	ori	r24, 0x02	; 2
 2c4:	80 83       	st	Z, r24
		sbi(ADCSRA, ADPS0);
 2c6:	80 81       	ld	r24, Z
 2c8:	81 60       	ori	r24, 0x01	; 1
 2ca:	80 83       	st	Z, r24
		cbi(ADCSRA, ADPS2);
		cbi(ADCSRA, ADPS1);
		sbi(ADCSRA, ADPS0);
	#endif
	// enable a2d conversions
	sbi(ADCSRA, ADEN);
 2cc:	80 81       	ld	r24, Z
 2ce:	80 68       	ori	r24, 0x80	; 128
 2d0:	80 83       	st	Z, r24
	// here so they can be used as normal digital i/o; they will be
	// reconnected in Serial.begin()
#if defined(UCSRB)
	UCSRB = 0;
#elif defined(UCSR0B)
	UCSR0B = 0;
 2d2:	10 92 c1 00 	sts	0x00C1, r1	; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7e00c1>
#endif
}
 2d6:	08 95       	ret

000002d8 <micros>:
	return m;
}

unsigned long micros() {
	unsigned long m;
	uint8_t oldSREG = SREG, t;
 2d8:	3f b7       	in	r19, 0x3f	; 63
	
	cli();
 2da:	f8 94       	cli
	m = timer0_overflow_count;
 2dc:	80 91 0c 02 	lds	r24, 0x020C	; 0x80020c <timer0_overflow_count>
 2e0:	90 91 0d 02 	lds	r25, 0x020D	; 0x80020d <timer0_overflow_count+0x1>
 2e4:	a0 91 0e 02 	lds	r26, 0x020E	; 0x80020e <timer0_overflow_count+0x2>
 2e8:	b0 91 0f 02 	lds	r27, 0x020F	; 0x80020f <timer0_overflow_count+0x3>
#if defined(TCNT0)
	t = TCNT0;
 2ec:	26 b5       	in	r18, 0x26	; 38
#else
	#error TIMER 0 not defined
#endif

#ifdef TIFR0
	if ((TIFR0 & _BV(TOV0)) && (t < 255))
 2ee:	a8 9b       	sbis	0x15, 0	; 21
 2f0:	05 c0       	rjmp	.+10     	; 0x2fc <micros+0x24>
 2f2:	2f 3f       	cpi	r18, 0xFF	; 255
 2f4:	19 f0       	breq	.+6      	; 0x2fc <micros+0x24>
		m++;
 2f6:	01 96       	adiw	r24, 0x01	; 1
 2f8:	a1 1d       	adc	r26, r1
 2fa:	b1 1d       	adc	r27, r1
#else
	if ((TIFR & _BV(TOV0)) && (t < 255))
		m++;
#endif

	SREG = oldSREG;
 2fc:	3f bf       	out	0x3f, r19	; 63
	
	return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
 2fe:	ba 2f       	mov	r27, r26
 300:	a9 2f       	mov	r26, r25
 302:	98 2f       	mov	r25, r24
 304:	88 27       	eor	r24, r24
 306:	bc 01       	movw	r22, r24
 308:	cd 01       	movw	r24, r26
 30a:	62 0f       	add	r22, r18
 30c:	71 1d       	adc	r23, r1
 30e:	81 1d       	adc	r24, r1
 310:	91 1d       	adc	r25, r1
 312:	66 0f       	add	r22, r22
 314:	77 1f       	adc	r23, r23
 316:	88 1f       	adc	r24, r24
 318:	99 1f       	adc	r25, r25
 31a:	66 0f       	add	r22, r22
 31c:	77 1f       	adc	r23, r23
 31e:	88 1f       	adc	r24, r24
 320:	99 1f       	adc	r25, r25
}
 322:	08 95       	ret

00000324 <delay>:

void delay(unsigned long ms)
{
 324:	8f 92       	push	r8
 326:	9f 92       	push	r9
 328:	af 92       	push	r10
 32a:	bf 92       	push	r11
 32c:	cf 92       	push	r12
 32e:	df 92       	push	r13
 330:	ef 92       	push	r14
 332:	ff 92       	push	r15
 334:	6b 01       	movw	r12, r22
 336:	7c 01       	movw	r14, r24
	uint32_t start = micros();
 338:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <micros>
 33c:	4b 01       	movw	r8, r22
 33e:	5c 01       	movw	r10, r24

	while (ms > 0) {
 340:	c1 14       	cp	r12, r1
 342:	d1 04       	cpc	r13, r1
 344:	e1 04       	cpc	r14, r1
 346:	f1 04       	cpc	r15, r1
 348:	a1 f4       	brne	.+40     	; 0x372 <delay+0x4e>
		while ( ms > 0 && (micros() - start) >= 1000) {
			ms--;
			start += 1000;
		}
	}
}
 34a:	ff 90       	pop	r15
 34c:	ef 90       	pop	r14
 34e:	df 90       	pop	r13
 350:	cf 90       	pop	r12
 352:	bf 90       	pop	r11
 354:	af 90       	pop	r10
 356:	9f 90       	pop	r9
 358:	8f 90       	pop	r8
 35a:	08 95       	ret
	uint32_t start = micros();

	while (ms > 0) {
		yield();
		while ( ms > 0 && (micros() - start) >= 1000) {
			ms--;
 35c:	21 e0       	ldi	r18, 0x01	; 1
 35e:	c2 1a       	sub	r12, r18
 360:	d1 08       	sbc	r13, r1
 362:	e1 08       	sbc	r14, r1
 364:	f1 08       	sbc	r15, r1
			start += 1000;
 366:	88 ee       	ldi	r24, 0xE8	; 232
 368:	88 0e       	add	r8, r24
 36a:	83 e0       	ldi	r24, 0x03	; 3
 36c:	98 1e       	adc	r9, r24
 36e:	a1 1c       	adc	r10, r1
 370:	b1 1c       	adc	r11, r1
{
	uint32_t start = micros();

	while (ms > 0) {
		yield();
		while ( ms > 0 && (micros() - start) >= 1000) {
 372:	c1 14       	cp	r12, r1
 374:	d1 04       	cpc	r13, r1
 376:	e1 04       	cpc	r14, r1
 378:	f1 04       	cpc	r15, r1
 37a:	11 f3       	breq	.-60     	; 0x340 <delay+0x1c>
 37c:	0e 94 6c 01 	call	0x2d8	; 0x2d8 <micros>
 380:	68 19       	sub	r22, r8
 382:	79 09       	sbc	r23, r9
 384:	8a 09       	sbc	r24, r10
 386:	9b 09       	sbc	r25, r11
 388:	68 3e       	cpi	r22, 0xE8	; 232
 38a:	73 40       	sbci	r23, 0x03	; 3
 38c:	81 05       	cpc	r24, r1
 38e:	91 05       	cpc	r25, r1
 390:	28 f7       	brcc	.-54     	; 0x35c <delay+0x38>
 392:	d6 cf       	rjmp	.-84     	; 0x340 <delay+0x1c>

00000394 <initVariant>:
int atexit(void (* /*func*/ )()) { return 0; }

// Weak empty variant initialization function.
// May be redefined by variant files.
void initVariant() __attribute__((weak));
void initVariant() { }
 394:	08 95       	ret

00000396 <Print::print(char)>:
  return write(str);
}

size_t Print::print(char c)
{
  return write(c);
 396:	dc 01       	movw	r26, r24
 398:	ed 91       	ld	r30, X+
 39a:	fc 91       	ld	r31, X
 39c:	01 90       	ld	r0, Z+
 39e:	f0 81       	ld	r31, Z
 3a0:	e0 2d       	mov	r30, r0
 3a2:	09 95       	icall
}
 3a4:	08 95       	ret

000003a6 <Print::print(__FlashStringHelper const*)>:
  }
  return n;
}

size_t Print::print(const __FlashStringHelper *ifsh)
{
 3a6:	ef 92       	push	r14
 3a8:	ff 92       	push	r15
 3aa:	0f 93       	push	r16
 3ac:	1f 93       	push	r17
 3ae:	cf 93       	push	r28
 3b0:	df 93       	push	r29
 3b2:	8c 01       	movw	r16, r24
 3b4:	fb 01       	movw	r30, r22
  PGM_P p = reinterpret_cast<PGM_P>(ifsh);
  size_t n = 0;
 3b6:	d0 e0       	ldi	r29, 0x00	; 0
 3b8:	c0 e0       	ldi	r28, 0x00	; 0
  while (1) {
    unsigned char c = pgm_read_byte(p++);
 3ba:	7f 01       	movw	r14, r30
 3bc:	8f ef       	ldi	r24, 0xFF	; 255
 3be:	e8 1a       	sub	r14, r24
 3c0:	f8 0a       	sbc	r15, r24
 3c2:	64 91       	lpm	r22, Z
    if (c == 0) break;
 3c4:	66 23       	and	r22, r22
 3c6:	69 f0       	breq	.+26     	; 0x3e2 <Print::print(__FlashStringHelper const*)+0x3c>
    if (write(c)) n++;
 3c8:	d8 01       	movw	r26, r16
 3ca:	ed 91       	ld	r30, X+
 3cc:	fc 91       	ld	r31, X
 3ce:	01 90       	ld	r0, Z+
 3d0:	f0 81       	ld	r31, Z
 3d2:	e0 2d       	mov	r30, r0
 3d4:	c8 01       	movw	r24, r16
 3d6:	09 95       	icall
 3d8:	89 2b       	or	r24, r25
 3da:	19 f0       	breq	.+6      	; 0x3e2 <Print::print(__FlashStringHelper const*)+0x3c>
 3dc:	21 96       	adiw	r28, 0x01	; 1
size_t Print::print(const __FlashStringHelper *ifsh)
{
  PGM_P p = reinterpret_cast<PGM_P>(ifsh);
  size_t n = 0;
  while (1) {
    unsigned char c = pgm_read_byte(p++);
 3de:	f7 01       	movw	r30, r14
 3e0:	ec cf       	rjmp	.-40     	; 0x3ba <Print::print(__FlashStringHelper const*)+0x14>
    if (c == 0) break;
    if (write(c)) n++;
    else break;
  }
  return n;
}
 3e2:	ce 01       	movw	r24, r28
 3e4:	df 91       	pop	r29
 3e6:	cf 91       	pop	r28
 3e8:	1f 91       	pop	r17
 3ea:	0f 91       	pop	r16
 3ec:	ff 90       	pop	r15
 3ee:	ef 90       	pop	r14
 3f0:	08 95       	ret

000003f2 <Print::write(unsigned char const*, unsigned int)>:

// Public Methods //////////////////////////////////////////////////////////////

/* default implementation: may be overridden */
size_t Print::write(const uint8_t *buffer, size_t size)
{
 3f2:	cf 92       	push	r12
 3f4:	df 92       	push	r13
 3f6:	ef 92       	push	r14
 3f8:	ff 92       	push	r15
 3fa:	0f 93       	push	r16
 3fc:	1f 93       	push	r17
 3fe:	cf 93       	push	r28
 400:	df 93       	push	r29
 402:	8c 01       	movw	r16, r24
 404:	db 01       	movw	r26, r22
  size_t n = 0;
 406:	d0 e0       	ldi	r29, 0x00	; 0
 408:	c0 e0       	ldi	r28, 0x00	; 0
  while (size--) {
 40a:	7a 01       	movw	r14, r20
 40c:	81 e0       	ldi	r24, 0x01	; 1
 40e:	e8 1a       	sub	r14, r24
 410:	f1 08       	sbc	r15, r1
 412:	45 2b       	or	r20, r21
 414:	a1 f0       	breq	.+40     	; 0x43e <__LOCK_REGION_LENGTH__+0x3e>
    if (write(*buffer++)) n++;
 416:	f8 01       	movw	r30, r16
 418:	80 81       	ld	r24, Z
 41a:	91 81       	ldd	r25, Z+1	; 0x01
 41c:	fc 01       	movw	r30, r24
 41e:	20 81       	ld	r18, Z
 420:	31 81       	ldd	r19, Z+1	; 0x01
 422:	6d 01       	movw	r12, r26
 424:	ff ef       	ldi	r31, 0xFF	; 255
 426:	cf 1a       	sub	r12, r31
 428:	df 0a       	sbc	r13, r31
 42a:	6c 91       	ld	r22, X
 42c:	c8 01       	movw	r24, r16
 42e:	f9 01       	movw	r30, r18
 430:	09 95       	icall
 432:	89 2b       	or	r24, r25
 434:	21 f0       	breq	.+8      	; 0x43e <__LOCK_REGION_LENGTH__+0x3e>
 436:	21 96       	adiw	r28, 0x01	; 1

/* default implementation: may be overridden */
size_t Print::write(const uint8_t *buffer, size_t size)
{
  size_t n = 0;
  while (size--) {
 438:	a7 01       	movw	r20, r14
    if (write(*buffer++)) n++;
 43a:	d6 01       	movw	r26, r12
 43c:	e6 cf       	rjmp	.-52     	; 0x40a <__LOCK_REGION_LENGTH__+0xa>
    else break;
  }
  return n;
}
 43e:	ce 01       	movw	r24, r28
 440:	df 91       	pop	r29
 442:	cf 91       	pop	r28
 444:	1f 91       	pop	r17
 446:	0f 91       	pop	r16
 448:	ff 90       	pop	r15
 44a:	ef 90       	pop	r14
 44c:	df 90       	pop	r13
 44e:	cf 90       	pop	r12
 450:	08 95       	ret

00000452 <__static_initialization_and_destruction_0(int, int)>:

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
}
 452:	01 97       	sbiw	r24, 0x01	; 1
 454:	09 f0       	breq	.+2      	; 0x458 <__static_initialization_and_destruction_0(int, int)+0x6>
 456:	08 95       	ret
 458:	6f 3f       	cpi	r22, 0xFF	; 255
 45a:	7f 4f       	sbci	r23, 0xFF	; 255
 45c:	e1 f7       	brne	.-8      	; 0x456 <__static_initialization_and_destruction_0(int, int)+0x4>
    size_t printNumber(unsigned long, uint8_t);
    size_t printFloat(double, uint8_t);
  protected:
    void setWriteError(int err = 1) { write_error = err; }
  public:
    Print() : write_error(0) {}
 45e:	ea e6       	ldi	r30, 0x6A	; 106
 460:	f1 e0       	ldi	r31, 0x01	; 1
 462:	13 82       	std	Z+3, r1	; 0x03
 464:	12 82       	std	Z+2, r1	; 0x02
  public:
    virtual int available() = 0;
    virtual int read() = 0;
    virtual int peek() = 0;

    Stream() {_timeout=1000;}
 466:	88 ee       	ldi	r24, 0xE8	; 232
 468:	93 e0       	ldi	r25, 0x03	; 3
 46a:	a0 e0       	ldi	r26, 0x00	; 0
 46c:	b0 e0       	ldi	r27, 0x00	; 0
 46e:	84 83       	std	Z+4, r24	; 0x04
 470:	95 83       	std	Z+5, r25	; 0x05
 472:	a6 83       	std	Z+6, r26	; 0x06
 474:	b7 83       	std	Z+7, r27	; 0x07
  volatile uint8_t *ucsrc, volatile uint8_t *udr) :
    _ubrrh(ubrrh), _ubrrl(ubrrl),
    _ucsra(ucsra), _ucsrb(ucsrb), _ucsrc(ucsrc),
    _udr(udr),
    _rx_buffer_head(0), _rx_buffer_tail(0),
    _tx_buffer_head(0), _tx_buffer_tail(0)
 476:	8e e0       	ldi	r24, 0x0E	; 14
 478:	91 e0       	ldi	r25, 0x01	; 1
 47a:	91 83       	std	Z+1, r25	; 0x01
 47c:	80 83       	st	Z, r24
 47e:	85 ec       	ldi	r24, 0xC5	; 197
 480:	90 e0       	ldi	r25, 0x00	; 0
 482:	95 87       	std	Z+13, r25	; 0x0d
 484:	84 87       	std	Z+12, r24	; 0x0c
 486:	84 ec       	ldi	r24, 0xC4	; 196
 488:	90 e0       	ldi	r25, 0x00	; 0
 48a:	97 87       	std	Z+15, r25	; 0x0f
 48c:	86 87       	std	Z+14, r24	; 0x0e
 48e:	80 ec       	ldi	r24, 0xC0	; 192
 490:	90 e0       	ldi	r25, 0x00	; 0
 492:	91 8b       	std	Z+17, r25	; 0x11
 494:	80 8b       	std	Z+16, r24	; 0x10
 496:	81 ec       	ldi	r24, 0xC1	; 193
 498:	90 e0       	ldi	r25, 0x00	; 0
 49a:	93 8b       	std	Z+19, r25	; 0x13
 49c:	82 8b       	std	Z+18, r24	; 0x12
 49e:	82 ec       	ldi	r24, 0xC2	; 194
 4a0:	90 e0       	ldi	r25, 0x00	; 0
 4a2:	95 8b       	std	Z+21, r25	; 0x15
 4a4:	84 8b       	std	Z+20, r24	; 0x14
 4a6:	86 ec       	ldi	r24, 0xC6	; 198
 4a8:	90 e0       	ldi	r25, 0x00	; 0
 4aa:	97 8b       	std	Z+23, r25	; 0x17
 4ac:	86 8b       	std	Z+22, r24	; 0x16
 4ae:	11 8e       	std	Z+25, r1	; 0x19
 4b0:	12 8e       	std	Z+26, r1	; 0x1a
 4b2:	13 8e       	std	Z+27, r1	; 0x1b
 4b4:	14 8e       	std	Z+28, r1	; 0x1c
 4b6:	cf cf       	rjmp	.-98     	; 0x456 <__static_initialization_and_destruction_0(int, int)+0x4>

000004b8 <HardwareSerial::availableForWrite()>:
    return c;
  }
}

int HardwareSerial::availableForWrite(void)
{
 4b8:	fc 01       	movw	r30, r24
  tx_buffer_index_t head;
  tx_buffer_index_t tail;

  TX_BUFFER_ATOMIC {
    head = _tx_buffer_head;
 4ba:	93 8d       	ldd	r25, Z+27	; 0x1b
    tail = _tx_buffer_tail;
 4bc:	84 8d       	ldd	r24, Z+28	; 0x1c
  }
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
 4be:	98 17       	cp	r25, r24
 4c0:	20 f4       	brcc	.+8      	; 0x4ca <HardwareSerial::availableForWrite()+0x12>
  return tail - head - 1;
 4c2:	89 1b       	sub	r24, r25
 4c4:	99 0b       	sbc	r25, r25
 4c6:	01 97       	sbiw	r24, 0x01	; 1
}
 4c8:	08 95       	ret

  TX_BUFFER_ATOMIC {
    head = _tx_buffer_head;
    tail = _tx_buffer_tail;
  }
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
 4ca:	2f e3       	ldi	r18, 0x3F	; 63
 4cc:	30 e0       	ldi	r19, 0x00	; 0
 4ce:	29 1b       	sub	r18, r25
 4d0:	31 09       	sbc	r19, r1
 4d2:	82 0f       	add	r24, r18
 4d4:	93 2f       	mov	r25, r19
 4d6:	91 1d       	adc	r25, r1
 4d8:	08 95       	ret

000004da <HardwareSerial::read()>:
    return _rx_buffer[_rx_buffer_tail];
  }
}

int HardwareSerial::read(void)
{
 4da:	fc 01       	movw	r30, r24
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
 4dc:	91 8d       	ldd	r25, Z+25	; 0x19
 4de:	82 8d       	ldd	r24, Z+26	; 0x1a
 4e0:	98 17       	cp	r25, r24
 4e2:	61 f0       	breq	.+24     	; 0x4fc <HardwareSerial::read()+0x22>
    return -1;
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
 4e4:	a2 8d       	ldd	r26, Z+26	; 0x1a
 4e6:	ae 0f       	add	r26, r30
 4e8:	bf 2f       	mov	r27, r31
 4ea:	b1 1d       	adc	r27, r1
 4ec:	5d 96       	adiw	r26, 0x1d	; 29
 4ee:	8c 91       	ld	r24, X
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
 4f0:	92 8d       	ldd	r25, Z+26	; 0x1a
 4f2:	9f 5f       	subi	r25, 0xFF	; 255
 4f4:	9f 73       	andi	r25, 0x3F	; 63
 4f6:	92 8f       	std	Z+26, r25	; 0x1a
    return c;
 4f8:	90 e0       	ldi	r25, 0x00	; 0
 4fa:	08 95       	ret

int HardwareSerial::read(void)
{
  // if the head isn't ahead of the tail, we don't have any characters
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 4fc:	8f ef       	ldi	r24, 0xFF	; 255
 4fe:	9f ef       	ldi	r25, 0xFF	; 255
  } else {
    unsigned char c = _rx_buffer[_rx_buffer_tail];
    _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
    return c;
  }
}
 500:	08 95       	ret

00000502 <HardwareSerial::peek()>:
{
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
}

int HardwareSerial::peek(void)
{
 502:	fc 01       	movw	r30, r24
  if (_rx_buffer_head == _rx_buffer_tail) {
 504:	91 8d       	ldd	r25, Z+25	; 0x19
 506:	82 8d       	ldd	r24, Z+26	; 0x1a
 508:	98 17       	cp	r25, r24
 50a:	31 f0       	breq	.+12     	; 0x518 <HardwareSerial::peek()+0x16>
    return -1;
  } else {
    return _rx_buffer[_rx_buffer_tail];
 50c:	82 8d       	ldd	r24, Z+26	; 0x1a
 50e:	e8 0f       	add	r30, r24
 510:	f1 1d       	adc	r31, r1
 512:	85 8d       	ldd	r24, Z+29	; 0x1d
 514:	90 e0       	ldi	r25, 0x00	; 0
 516:	08 95       	ret
}

int HardwareSerial::peek(void)
{
  if (_rx_buffer_head == _rx_buffer_tail) {
    return -1;
 518:	8f ef       	ldi	r24, 0xFF	; 255
 51a:	9f ef       	ldi	r25, 0xFF	; 255
  } else {
    return _rx_buffer[_rx_buffer_tail];
  }
}
 51c:	08 95       	ret

0000051e <HardwareSerial::available()>:
  _rx_buffer_head = _rx_buffer_tail;
}

int HardwareSerial::available(void)
{
  return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
 51e:	fc 01       	movw	r30, r24
 520:	21 8d       	ldd	r18, Z+25	; 0x19
 522:	30 e0       	ldi	r19, 0x00	; 0
 524:	20 5c       	subi	r18, 0xC0	; 192
 526:	3f 4f       	sbci	r19, 0xFF	; 255
 528:	82 8d       	ldd	r24, Z+26	; 0x1a
 52a:	a9 01       	movw	r20, r18
 52c:	48 1b       	sub	r20, r24
 52e:	51 09       	sbc	r21, r1
 530:	ca 01       	movw	r24, r20
}
 532:	8f 73       	andi	r24, 0x3F	; 63
 534:	99 27       	eor	r25, r25
 536:	08 95       	ret

00000538 <Serial0_available()>:
#endif

// Function that can be weakly referenced by serialEventRun to prevent
// pulling in this file if it's not otherwise used.
bool Serial0_available() {
  return Serial.available();
 538:	8a e6       	ldi	r24, 0x6A	; 106
 53a:	91 e0       	ldi	r25, 0x01	; 1
 53c:	0e 94 8f 02 	call	0x51e	; 0x51e <HardwareSerial::available()>
 540:	21 e0       	ldi	r18, 0x01	; 1
 542:	89 2b       	or	r24, r25
 544:	09 f4       	brne	.+2      	; 0x548 <Serial0_available()+0x10>
 546:	20 e0       	ldi	r18, 0x00	; 0
}
 548:	82 2f       	mov	r24, r18
 54a:	08 95       	ret

0000054c <HardwareSerial::begin(unsigned long, unsigned char)>:
}

// Public Methods //////////////////////////////////////////////////////////////

void HardwareSerial::begin(unsigned long baud, byte config)
{
 54c:	cf 92       	push	r12
 54e:	df 92       	push	r13
 550:	ef 92       	push	r14
 552:	ff 92       	push	r15
 554:	1f 93       	push	r17
 556:	cf 93       	push	r28
 558:	df 93       	push	r29
 55a:	ec 01       	movw	r28, r24
 55c:	6a 01       	movw	r12, r20
 55e:	7b 01       	movw	r14, r22
 560:	12 2f       	mov	r17, r18
  // Try u2x mode first
  uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
 562:	60 e0       	ldi	r22, 0x00	; 0
 564:	79 e0       	ldi	r23, 0x09	; 9
 566:	8d e3       	ldi	r24, 0x3D	; 61
 568:	90 e0       	ldi	r25, 0x00	; 0
 56a:	a7 01       	movw	r20, r14
 56c:	96 01       	movw	r18, r12
 56e:	0e 94 89 07 	call	0xf12	; 0xf12 <__udivmodsi4>
 572:	21 50       	subi	r18, 0x01	; 1
 574:	31 09       	sbc	r19, r1
 576:	41 09       	sbc	r20, r1
 578:	51 09       	sbc	r21, r1
 57a:	56 95       	lsr	r21
 57c:	47 95       	ror	r20
 57e:	37 95       	ror	r19
 580:	27 95       	ror	r18
  *_ucsra = 1 << U2X0;
 582:	e8 89       	ldd	r30, Y+16	; 0x10
 584:	f9 89       	ldd	r31, Y+17	; 0x11
 586:	82 e0       	ldi	r24, 0x02	; 2
 588:	80 83       	st	Z, r24
  // hardcoded exception for 57600 for compatibility with the bootloader
  // shipped with the Duemilanove and previous boards and the firmware
  // on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
  // be > 4095, so switch back to non-u2x mode if the baud rate is too
  // low.
  if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
 58a:	c1 14       	cp	r12, r1
 58c:	81 ee       	ldi	r24, 0xE1	; 225
 58e:	d8 06       	cpc	r13, r24
 590:	e1 04       	cpc	r14, r1
 592:	f1 04       	cpc	r15, r1
 594:	21 f0       	breq	.+8      	; 0x59e <HardwareSerial::begin(unsigned long, unsigned char)+0x52>
 596:	21 15       	cp	r18, r1
 598:	80 e1       	ldi	r24, 0x10	; 16
 59a:	38 07       	cpc	r19, r24
 59c:	98 f0       	brcs	.+38     	; 0x5c4 <HardwareSerial::begin(unsigned long, unsigned char)+0x78>
  {
    *_ucsra = 0;
 59e:	e8 89       	ldd	r30, Y+16	; 0x10
 5a0:	f9 89       	ldd	r31, Y+17	; 0x11
 5a2:	10 82       	st	Z, r1
    baud_setting = (F_CPU / 8 / baud - 1) / 2;
 5a4:	60 e8       	ldi	r22, 0x80	; 128
 5a6:	74 e8       	ldi	r23, 0x84	; 132
 5a8:	8e e1       	ldi	r24, 0x1E	; 30
 5aa:	90 e0       	ldi	r25, 0x00	; 0
 5ac:	a7 01       	movw	r20, r14
 5ae:	96 01       	movw	r18, r12
 5b0:	0e 94 89 07 	call	0xf12	; 0xf12 <__udivmodsi4>
 5b4:	21 50       	subi	r18, 0x01	; 1
 5b6:	31 09       	sbc	r19, r1
 5b8:	41 09       	sbc	r20, r1
 5ba:	51 09       	sbc	r21, r1
 5bc:	56 95       	lsr	r21
 5be:	47 95       	ror	r20
 5c0:	37 95       	ror	r19
 5c2:	27 95       	ror	r18
  }

  // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
  *_ubrrh = baud_setting >> 8;
 5c4:	ec 85       	ldd	r30, Y+12	; 0x0c
 5c6:	fd 85       	ldd	r31, Y+13	; 0x0d
 5c8:	30 83       	st	Z, r19
  *_ubrrl = baud_setting;
 5ca:	ee 85       	ldd	r30, Y+14	; 0x0e
 5cc:	ff 85       	ldd	r31, Y+15	; 0x0f
 5ce:	20 83       	st	Z, r18

  _written = false;
 5d0:	18 8e       	std	Y+24, r1	; 0x18

  //set the data bits, parity, and stop bits
#if defined(__AVR_ATmega8__)
  config |= 0x80; // select UCSRC register (shared with UBRRH)
#endif
  *_ucsrc = config;
 5d2:	ec 89       	ldd	r30, Y+20	; 0x14
 5d4:	fd 89       	ldd	r31, Y+21	; 0x15
 5d6:	10 83       	st	Z, r17
  
  sbi(*_ucsrb, RXEN0);
 5d8:	ea 89       	ldd	r30, Y+18	; 0x12
 5da:	fb 89       	ldd	r31, Y+19	; 0x13
 5dc:	80 81       	ld	r24, Z
 5de:	80 61       	ori	r24, 0x10	; 16
 5e0:	80 83       	st	Z, r24
  sbi(*_ucsrb, TXEN0);
 5e2:	ea 89       	ldd	r30, Y+18	; 0x12
 5e4:	fb 89       	ldd	r31, Y+19	; 0x13
 5e6:	80 81       	ld	r24, Z
 5e8:	88 60       	ori	r24, 0x08	; 8
 5ea:	80 83       	st	Z, r24
  sbi(*_ucsrb, RXCIE0);
 5ec:	ea 89       	ldd	r30, Y+18	; 0x12
 5ee:	fb 89       	ldd	r31, Y+19	; 0x13
 5f0:	80 81       	ld	r24, Z
 5f2:	80 68       	ori	r24, 0x80	; 128
 5f4:	80 83       	st	Z, r24
  cbi(*_ucsrb, UDRIE0);
 5f6:	ea 89       	ldd	r30, Y+18	; 0x12
 5f8:	fb 89       	ldd	r31, Y+19	; 0x13
 5fa:	80 81       	ld	r24, Z
 5fc:	8f 7d       	andi	r24, 0xDF	; 223
 5fe:	80 83       	st	Z, r24
}
 600:	df 91       	pop	r29
 602:	cf 91       	pop	r28
 604:	1f 91       	pop	r17
 606:	ff 90       	pop	r15
 608:	ef 90       	pop	r14
 60a:	df 90       	pop	r13
 60c:	cf 90       	pop	r12
 60e:	08 95       	ret

00000610 <HardwareSerial::_tx_udr_empty_irq()>:
#endif

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_tx_udr_empty_irq(void)
{
 610:	fc 01       	movw	r30, r24
  // If interrupts are enabled, there must be more data in the output
  // buffer. Send the next byte
  unsigned char c = _tx_buffer[_tx_buffer_tail];
 612:	a4 8d       	ldd	r26, Z+28	; 0x1c
 614:	a8 0f       	add	r26, r24
 616:	b9 2f       	mov	r27, r25
 618:	b1 1d       	adc	r27, r1
 61a:	a3 5a       	subi	r26, 0xA3	; 163
 61c:	bf 4f       	sbci	r27, 0xFF	; 255
 61e:	2c 91       	ld	r18, X
  _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
 620:	84 8d       	ldd	r24, Z+28	; 0x1c
 622:	90 e0       	ldi	r25, 0x00	; 0
 624:	01 96       	adiw	r24, 0x01	; 1
 626:	8f 73       	andi	r24, 0x3F	; 63
 628:	90 78       	andi	r25, 0x80	; 128
 62a:	84 8f       	std	Z+28, r24	; 0x1c

  *_udr = c;
 62c:	a6 89       	ldd	r26, Z+22	; 0x16
 62e:	b7 89       	ldd	r27, Z+23	; 0x17
 630:	2c 93       	st	X, r18
  // location". This makes sure flush() won't return until the bytes
  // actually got written. Other r/w bits are preserved, and zeroes
  // written to the rest.

#ifdef MPCM0
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 632:	a0 89       	ldd	r26, Z+16	; 0x10
 634:	b1 89       	ldd	r27, Z+17	; 0x11
 636:	8c 91       	ld	r24, X
 638:	83 70       	andi	r24, 0x03	; 3
 63a:	80 64       	ori	r24, 0x40	; 64
 63c:	8c 93       	st	X, r24
#else
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif

  if (_tx_buffer_head == _tx_buffer_tail) {
 63e:	93 8d       	ldd	r25, Z+27	; 0x1b
 640:	84 8d       	ldd	r24, Z+28	; 0x1c
 642:	98 13       	cpse	r25, r24
    // Buffer empty, so disable interrupts
    cbi(*_ucsrb, UDRIE0);
  }
}
 644:	08 95       	ret
  *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif

  if (_tx_buffer_head == _tx_buffer_tail) {
    // Buffer empty, so disable interrupts
    cbi(*_ucsrb, UDRIE0);
 646:	02 88       	ldd	r0, Z+18	; 0x12
 648:	f3 89       	ldd	r31, Z+19	; 0x13
 64a:	e0 2d       	mov	r30, r0
 64c:	80 81       	ld	r24, Z
 64e:	8f 7d       	andi	r24, 0xDF	; 223
 650:	80 83       	st	Z, r24
 652:	f8 cf       	rjmp	.-16     	; 0x644 <HardwareSerial::_tx_udr_empty_irq()+0x34>

00000654 <HardwareSerial::write(unsigned char)>:
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}

size_t HardwareSerial::write(uint8_t c)
{
 654:	0f 93       	push	r16
 656:	1f 93       	push	r17
 658:	cf 93       	push	r28
 65a:	df 93       	push	r29
 65c:	ec 01       	movw	r28, r24
  _written = true;
 65e:	81 e0       	ldi	r24, 0x01	; 1
 660:	88 8f       	std	Y+24, r24	; 0x18
  // If the buffer and the data register is empty, just write the byte
  // to the data register and be done. This shortcut helps
  // significantly improve the effective datarate at high (>
  // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
 662:	9b 8d       	ldd	r25, Y+27	; 0x1b
 664:	8c 8d       	ldd	r24, Y+28	; 0x1c
 666:	98 17       	cp	r25, r24
 668:	b1 f0       	breq	.+44     	; 0x696 <HardwareSerial::write(unsigned char)+0x42>
 66a:	06 2f       	mov	r16, r22
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << TXC0)));
#endif
    }
    return 1;
  }
  tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
 66c:	8b 8d       	ldd	r24, Y+27	; 0x1b
 66e:	90 e0       	ldi	r25, 0x00	; 0
 670:	01 96       	adiw	r24, 0x01	; 1
 672:	8f 73       	andi	r24, 0x3F	; 63
 674:	90 78       	andi	r25, 0x80	; 128
 676:	18 2f       	mov	r17, r24
	
  // If the output buffer is full, there's nothing for it other than to 
  // wait for the interrupt handler to empty it a bit
  while (i == _tx_buffer_tail) {
 678:	8c 8d       	ldd	r24, Y+28	; 0x1c
 67a:	81 13       	cpse	r24, r17
 67c:	1e c0       	rjmp	.+60     	; 0x6ba <HardwareSerial::write(unsigned char)+0x66>
    if (bit_is_clear(SREG, SREG_I)) {
 67e:	0f b6       	in	r0, 0x3f	; 63
 680:	07 fc       	sbrc	r0, 7
 682:	fa cf       	rjmp	.-12     	; 0x678 <HardwareSerial::write(unsigned char)+0x24>
      // Interrupts are disabled, so we'll have to poll the data
      // register empty flag ourselves. If it is set, pretend an
      // interrupt has happened and call the handler to free up
      // space for us.
      if(bit_is_set(*_ucsra, UDRE0))
 684:	e8 89       	ldd	r30, Y+16	; 0x10
 686:	f9 89       	ldd	r31, Y+17	; 0x11
 688:	80 81       	ld	r24, Z
 68a:	85 ff       	sbrs	r24, 5
 68c:	f5 cf       	rjmp	.-22     	; 0x678 <HardwareSerial::write(unsigned char)+0x24>
	_tx_udr_empty_irq();
 68e:	ce 01       	movw	r24, r28
 690:	0e 94 08 03 	call	0x610	; 0x610 <HardwareSerial::_tx_udr_empty_irq()>
 694:	f1 cf       	rjmp	.-30     	; 0x678 <HardwareSerial::write(unsigned char)+0x24>
  _written = true;
  // If the buffer and the data register is empty, just write the byte
  // to the data register and be done. This shortcut helps
  // significantly improve the effective datarate at high (>
  // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
 696:	e8 89       	ldd	r30, Y+16	; 0x10
 698:	f9 89       	ldd	r31, Y+17	; 0x11
 69a:	80 81       	ld	r24, Z
 69c:	85 ff       	sbrs	r24, 5
 69e:	e5 cf       	rjmp	.-54     	; 0x66a <HardwareSerial::write(unsigned char)+0x16>
    // So writing UDR must happen first.
    // Writing UDR and clearing TC must be done atomically, otherwise
    // interrupts might delay the TXC clear so the byte written to UDR
    // is transmitted (setting TXC) before clearing TXC. Then TXC will
    // be cleared when no bytes are left, causing flush() to hang
    ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 6a0:	9f b7       	in	r25, 0x3f	; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 6a2:	f8 94       	cli
      *_udr = c;
 6a4:	ee 89       	ldd	r30, Y+22	; 0x16
 6a6:	ff 89       	ldd	r31, Y+23	; 0x17
 6a8:	60 83       	st	Z, r22
#ifdef MPCM0
      *_ucsra = ((*_ucsra) & ((1 << U2X0) | (1 << MPCM0))) | (1 << TXC0);
 6aa:	e8 89       	ldd	r30, Y+16	; 0x10
 6ac:	f9 89       	ldd	r31, Y+17	; 0x11
 6ae:	80 81       	ld	r24, Z
 6b0:	83 70       	andi	r24, 0x03	; 3
 6b2:	80 64       	ori	r24, 0x40	; 64
 6b4:	80 83       	st	Z, r24
    (void)__s;
}

static __inline__ void __iRestore(const  uint8_t *__s)
{
    SREG = *__s;
 6b6:	9f bf       	out	0x3f, r25	; 63
    __asm__ volatile ("" ::: "memory");
 6b8:	10 c0       	rjmp	.+32     	; 0x6da <HardwareSerial::write(unsigned char)+0x86>
    } else {
      // nop, the interrupt handler will free up space for us
    }
  }

  _tx_buffer[_tx_buffer_head] = c;
 6ba:	eb 8d       	ldd	r30, Y+27	; 0x1b
 6bc:	ec 0f       	add	r30, r28
 6be:	fd 2f       	mov	r31, r29
 6c0:	f1 1d       	adc	r31, r1
 6c2:	e3 5a       	subi	r30, 0xA3	; 163
 6c4:	ff 4f       	sbci	r31, 0xFF	; 255
 6c6:	00 83       	st	Z, r16

  // make atomic to prevent execution of ISR between setting the
  // head pointer and setting the interrupt flag resulting in buffer
  // retransmission
  ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 6c8:	9f b7       	in	r25, 0x3f	; 63
    return 1;
}

static __inline__ uint8_t __iCliRetVal(void)
{
    cli();
 6ca:	f8 94       	cli
    _tx_buffer_head = i;
 6cc:	1b 8f       	std	Y+27, r17	; 0x1b
    sbi(*_ucsrb, UDRIE0);
 6ce:	ea 89       	ldd	r30, Y+18	; 0x12
 6d0:	fb 89       	ldd	r31, Y+19	; 0x13
 6d2:	80 81       	ld	r24, Z
 6d4:	80 62       	ori	r24, 0x20	; 32
 6d6:	80 83       	st	Z, r24
    (void)__s;
}

static __inline__ void __iRestore(const  uint8_t *__s)
{
    SREG = *__s;
 6d8:	9f bf       	out	0x3f, r25	; 63
  }
  
  return 1;
}
 6da:	81 e0       	ldi	r24, 0x01	; 1
 6dc:	90 e0       	ldi	r25, 0x00	; 0
 6de:	df 91       	pop	r29
 6e0:	cf 91       	pop	r28
 6e2:	1f 91       	pop	r17
 6e4:	0f 91       	pop	r16
 6e6:	08 95       	ret

000006e8 <HardwareSerial::flush()>:
  if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  return tail - head - 1;
}

void HardwareSerial::flush()
{
 6e8:	cf 93       	push	r28
 6ea:	df 93       	push	r29
 6ec:	ec 01       	movw	r28, r24
  // If we have never written a byte, no need to flush. This special
  // case is needed since there is no way to force the TXC (transmit
  // complete) bit to 1 during initialization
  if (!_written)
 6ee:	88 8d       	ldd	r24, Y+24	; 0x18
 6f0:	81 11       	cpse	r24, r1
 6f2:	04 c0       	rjmp	.+8      	; 0x6fc <HardwareSerial::flush()+0x14>
 6f4:	0d c0       	rjmp	.+26     	; 0x710 <HardwareSerial::flush()+0x28>
    return;

  while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
    if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
 6f6:	0f b6       	in	r0, 0x3f	; 63
 6f8:	07 fe       	sbrs	r0, 7
 6fa:	0d c0       	rjmp	.+26     	; 0x716 <HardwareSerial::flush()+0x2e>
  // case is needed since there is no way to force the TXC (transmit
  // complete) bit to 1 during initialization
  if (!_written)
    return;

  while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
 6fc:	ea 89       	ldd	r30, Y+18	; 0x12
 6fe:	fb 89       	ldd	r31, Y+19	; 0x13
 700:	80 81       	ld	r24, Z
 702:	85 fd       	sbrc	r24, 5
 704:	f8 cf       	rjmp	.-16     	; 0x6f6 <HardwareSerial::flush()+0xe>
 706:	a8 89       	ldd	r26, Y+16	; 0x10
 708:	b9 89       	ldd	r27, Y+17	; 0x11
 70a:	8c 91       	ld	r24, X
 70c:	86 ff       	sbrs	r24, 6
 70e:	f3 cf       	rjmp	.-26     	; 0x6f6 <HardwareSerial::flush()+0xe>
	if (bit_is_set(*_ucsra, UDRE0))
	  _tx_udr_empty_irq();
  }
  // If we get here, nothing is queued anymore (DRIE is disabled) and
  // the hardware finished transmission (TXC is set).
}
 710:	df 91       	pop	r29
 712:	cf 91       	pop	r28
 714:	08 95       	ret
  // complete) bit to 1 during initialization
  if (!_written)
    return;

  while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
    if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
 716:	80 81       	ld	r24, Z
 718:	85 ff       	sbrs	r24, 5
 71a:	f0 cf       	rjmp	.-32     	; 0x6fc <HardwareSerial::flush()+0x14>
	// Interrupts are globally disabled, but the DR empty
	// interrupt should be enabled, so poll the DR empty flag to
	// prevent deadlock
	if (bit_is_set(*_ucsra, UDRE0))
 71c:	e8 89       	ldd	r30, Y+16	; 0x10
 71e:	f9 89       	ldd	r31, Y+17	; 0x11
 720:	80 81       	ld	r24, Z
 722:	85 ff       	sbrs	r24, 5
 724:	eb cf       	rjmp	.-42     	; 0x6fc <HardwareSerial::flush()+0x14>
	  _tx_udr_empty_irq();
 726:	ce 01       	movw	r24, r28
 728:	0e 94 08 03 	call	0x610	; 0x610 <HardwareSerial::_tx_udr_empty_irq()>
 72c:	e7 cf       	rjmp	.-50     	; 0x6fc <HardwareSerial::flush()+0x14>

0000072e <serialEventRun()>:
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 72e:	80 e0       	ldi	r24, 0x00	; 0
 730:	90 e0       	ldi	r25, 0x00	; 0
 732:	89 2b       	or	r24, r25
 734:	21 f0       	breq	.+8      	; 0x73e <serialEventRun()+0x10>
 736:	0e 94 9c 02 	call	0x538	; 0x538 <Serial0_available()>
 73a:	81 11       	cpse	r24, r1
 73c:	01 c0       	rjmp	.+2      	; 0x740 <serialEventRun()+0x12>
  if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
#endif
#if defined(HAVE_HWSERIAL3)
  if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
#endif
}
 73e:	08 95       	ret
#endif

void serialEventRun(void)
{
#if defined(HAVE_HWSERIAL0)
  if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
 740:	0e 94 00 00 	call	0	; 0x0 <__vectors>
 744:	fc cf       	rjmp	.-8      	; 0x73e <serialEventRun()+0x10>

00000746 <resetState()>:
void setAddress(uint16_t address, bool outputEnable) {
  shiftOutFaster(address | (outputEnable ? 0x00 : 0x8000));
}

void resetState() {
  byteCount = 0;
 746:	10 92 67 01 	sts	0x0167, r1	; 0x800167 <byteCount+0x1>
 74a:	10 92 66 01 	sts	0x0166, r1	; 0x800166 <byteCount>
  address = 0;
 74e:	10 92 65 01 	sts	0x0165, r1	; 0x800165 <address+0x1>
 752:	10 92 64 01 	sts	0x0164, r1	; 0x800164 <address>
  parameter = 0;
 756:	10 92 63 01 	sts	0x0163, r1	; 0x800163 <parameter+0x1>
 75a:	10 92 62 01 	sts	0x0162, r1	; 0x800162 <parameter>
  pageCount = 0;
 75e:	10 92 21 01 	sts	0x0121, r1	; 0x800121 <pageCount>
  currentState = State::Idle;
 762:	10 92 69 01 	sts	0x0169, r1	; 0x800169 <currentState>
  currentCommand = Command::None;
 766:	10 92 68 01 	sts	0x0168, r1	; 0x800168 <currentCommand>
}
 76a:	08 95       	ret

0000076c <setAddress(unsigned int, bool)>:
  PORTD |= _BV(PD4);
  PORTD &= ~_BV(PD4);
}

void setAddress(uint16_t address, bool outputEnable) {
  shiftOutFaster(address | (outputEnable ? 0x00 : 0x8000));
 76c:	66 23       	and	r22, r22
 76e:	31 f0       	breq	.+12     	; 0x77c <setAddress(unsigned int, bool)+0x10>
 770:	30 e0       	ldi	r19, 0x00	; 0
 772:	20 e0       	ldi	r18, 0x00	; 0
 774:	28 2b       	or	r18, r24
 776:	39 2b       	or	r19, r25
  bufferWrite(Serial.read());
}

// takes ~15.5 us
void shiftOutFaster(uint16_t value) {
  for (uint8_t i = 0; i < 16; ++i) {
 778:	80 e0       	ldi	r24, 0x00	; 0
 77a:	0f c0       	rjmp	.+30     	; 0x79a <setAddress(unsigned int, bool)+0x2e>
  PORTD |= _BV(PD4);
  PORTD &= ~_BV(PD4);
}

void setAddress(uint16_t address, bool outputEnable) {
  shiftOutFaster(address | (outputEnable ? 0x00 : 0x8000));
 77c:	20 e0       	ldi	r18, 0x00	; 0
 77e:	30 e8       	ldi	r19, 0x80	; 128
 780:	f9 cf       	rjmp	.-14     	; 0x774 <setAddress(unsigned int, bool)+0x8>
void shiftOutFaster(uint16_t value) {
  for (uint8_t i = 0; i < 16; ++i) {

    // check MSB
    if (value & (1 << 15)) {
      PORTD |= _BV(PD2);
 782:	9b b1       	in	r25, 0x0b	; 11
 784:	94 60       	ori	r25, 0x04	; 4
 786:	9b b9       	out	0x0b, r25	; 11
    } else {
      PORTD &= ~_BV(PD2);
    }

    // pin 3 toggle clock
    PORTD |= _BV(PD3);
 788:	9b b1       	in	r25, 0x0b	; 11
 78a:	98 60       	ori	r25, 0x08	; 8
 78c:	9b b9       	out	0x0b, r25	; 11
    PORTD &= ~_BV(PD3);
 78e:	9b b1       	in	r25, 0x0b	; 11
 790:	97 7f       	andi	r25, 0xF7	; 247
 792:	9b b9       	out	0x0b, r25	; 11

    value <<= 1;
 794:	22 0f       	add	r18, r18
 796:	33 1f       	adc	r19, r19
  bufferWrite(Serial.read());
}

// takes ~15.5 us
void shiftOutFaster(uint16_t value) {
  for (uint8_t i = 0; i < 16; ++i) {
 798:	8f 5f       	subi	r24, 0xFF	; 255
 79a:	80 31       	cpi	r24, 0x10	; 16
 79c:	30 f4       	brcc	.+12     	; 0x7aa <setAddress(unsigned int, bool)+0x3e>

    // check MSB
    if (value & (1 << 15)) {
 79e:	33 23       	and	r19, r19
 7a0:	84 f3       	brlt	.-32     	; 0x782 <setAddress(unsigned int, bool)+0x16>
      PORTD |= _BV(PD2);
    } else {
      PORTD &= ~_BV(PD2);
 7a2:	9b b1       	in	r25, 0x0b	; 11
 7a4:	9b 7f       	andi	r25, 0xFB	; 251
 7a6:	9b b9       	out	0x0b, r25	; 11
 7a8:	ef cf       	rjmp	.-34     	; 0x788 <setAddress(unsigned int, bool)+0x1c>

    value <<= 1;
  }

  // pin 4 toggle latch
  PORTD |= _BV(PD4);
 7aa:	8b b1       	in	r24, 0x0b	; 11
 7ac:	80 61       	ori	r24, 0x10	; 16
 7ae:	8b b9       	out	0x0b, r24	; 11
  PORTD &= ~_BV(PD4);
 7b0:	8b b1       	in	r24, 0x0b	; 11
 7b2:	8f 7e       	andi	r24, 0xEF	; 239
 7b4:	8b b9       	out	0x0b, r24	; 11
}

void setAddress(uint16_t address, bool outputEnable) {
  shiftOutFaster(address | (outputEnable ? 0x00 : 0x8000));
}
 7b6:	08 95       	ret

000007b8 <setup>:
  disableWriteProtection();
}

void setup() {
  // set data pins direction as input
  DDRD &= B00011111;  // PD5, PD6, PD7 inputs (low), pins 5, 6, 7
 7b8:	8a b1       	in	r24, 0x0a	; 10
 7ba:	8f 71       	andi	r24, 0x1F	; 31
 7bc:	8a b9       	out	0x0a, r24	; 10
  DDRB &= B11100000;  // PB0, PB1, PB2, PB3, PB4 inputs, pins 8, 9, 10, 11, 12
 7be:	84 b1       	in	r24, 0x04	; 4
 7c0:	80 7e       	andi	r24, 0xE0	; 224
 7c2:	84 b9       	out	0x04, r24	; 4

  pinMode(SHIFT_DATA, OUTPUT);
 7c4:	61 e0       	ldi	r22, 0x01	; 1
 7c6:	82 e0       	ldi	r24, 0x02	; 2
 7c8:	0e 94 f2 00 	call	0x1e4	; 0x1e4 <pinMode>
  pinMode(SHIFT_CLK, OUTPUT);
 7cc:	61 e0       	ldi	r22, 0x01	; 1
 7ce:	83 e0       	ldi	r24, 0x03	; 3
 7d0:	0e 94 f2 00 	call	0x1e4	; 0x1e4 <pinMode>
  pinMode(SHIFT_LATCH, OUTPUT);
 7d4:	61 e0       	ldi	r22, 0x01	; 1
 7d6:	84 e0       	ldi	r24, 0x04	; 4
 7d8:	0e 94 f2 00 	call	0x1e4	; 0x1e4 <pinMode>
  pinMode(WRITE_EN, OUTPUT);
 7dc:	61 e0       	ldi	r22, 0x01	; 1
 7de:	8d e0       	ldi	r24, 0x0D	; 13
 7e0:	0e 94 f2 00 	call	0x1e4	; 0x1e4 <pinMode>
  digitalWrite(WRITE_EN, HIGH);
 7e4:	61 e0       	ldi	r22, 0x01	; 1
 7e6:	8d e0       	ldi	r24, 0x0D	; 13
 7e8:	0e 94 bf 00 	call	0x17e	; 0x17e <digitalWrite>
  digitalWrite(SHIFT_CLK, LOW);
 7ec:	60 e0       	ldi	r22, 0x00	; 0
 7ee:	83 e0       	ldi	r24, 0x03	; 3
 7f0:	0e 94 bf 00 	call	0x17e	; 0x17e <digitalWrite>
  digitalWrite(SHIFT_LATCH, LOW);
 7f4:	60 e0       	ldi	r22, 0x00	; 0
 7f6:	84 e0       	ldi	r24, 0x04	; 4
 7f8:	0e 94 bf 00 	call	0x17e	; 0x17e <digitalWrite>

  setAddress(0, false);  // disable output
 7fc:	60 e0       	ldi	r22, 0x00	; 0
 7fe:	90 e0       	ldi	r25, 0x00	; 0
 800:	80 e0       	ldi	r24, 0x00	; 0
 802:	0e 94 b6 03 	call	0x76c	; 0x76c <setAddress(unsigned int, bool)>
  public:
    inline HardwareSerial(
      volatile uint8_t *ubrrh, volatile uint8_t *ubrrl,
      volatile uint8_t *ucsra, volatile uint8_t *ucsrb,
      volatile uint8_t *ucsrc, volatile uint8_t *udr);
    void begin(unsigned long baud) { begin(baud, SERIAL_8N1); }
 806:	26 e0       	ldi	r18, 0x06	; 6
 808:	40 e0       	ldi	r20, 0x00	; 0
 80a:	52 ec       	ldi	r21, 0xC2	; 194
 80c:	61 e0       	ldi	r22, 0x01	; 1
 80e:	70 e0       	ldi	r23, 0x00	; 0
 810:	8a e6       	ldi	r24, 0x6A	; 106
 812:	91 e0       	ldi	r25, 0x01	; 1
 814:	0e 94 a6 02 	call	0x54c	; 0x54c <HardwareSerial::begin(unsigned long, unsigned char)>

  Serial.begin(115200);
}
 818:	08 95       	ret

0000081a <readEEPROM(unsigned int)>:
}

// Read byte at specified address
uint8_t readEEPROM(uint16_t address) {
  // set data pins direction as input
  DDRD &= B00011111; // PD5, PD6, PD7 inputs (low), pins 5, 6, 7
 81a:	2a b1       	in	r18, 0x0a	; 10
 81c:	2f 71       	andi	r18, 0x1F	; 31
 81e:	2a b9       	out	0x0a, r18	; 10
  DDRB &= B11100000; // PB0, PB1, PB2, PB3, PB4 inputs, pins 8, 9, 10, 11, 12
 820:	24 b1       	in	r18, 0x04	; 4
 822:	20 7e       	andi	r18, 0xE0	; 224
 824:	24 b9       	out	0x04, r18	; 4

  setAddress(address, /*outputEnable*/ true);
 826:	61 e0       	ldi	r22, 0x01	; 1
 828:	0e 94 b6 03 	call	0x76c	; 0x76c <setAddress(unsigned int, bool)>

  asm volatile( // delay 4 clock cycles (250 ns)
    "nop\n\t"
    "nop\n\t"
    "nop\n\t"
    "nop\n\t");
 82c:	00 00       	nop
 82e:	00 00       	nop
 830:	00 00       	nop
 832:	00 00       	nop

  // MSB is pin 12, LSB is pin 5
  //                   12---8                    7-5
  //return ((PINB & B00011111) << 3) + ((PIND & B11100000) >> 5);
  return (PINB << 3) | (PIND >> 5);
 834:	23 b1       	in	r18, 0x03	; 3
 836:	30 e0       	ldi	r19, 0x00	; 0
 838:	22 0f       	add	r18, r18
 83a:	33 1f       	adc	r19, r19
 83c:	22 0f       	add	r18, r18
 83e:	33 1f       	adc	r19, r19
 840:	22 0f       	add	r18, r18
 842:	33 1f       	adc	r19, r19
 844:	99 b1       	in	r25, 0x09	; 9
 846:	89 2f       	mov	r24, r25
 848:	90 e0       	ldi	r25, 0x00	; 0
 84a:	95 95       	asr	r25
 84c:	87 95       	ror	r24
 84e:	95 95       	asr	r25
 850:	87 95       	ror	r24
 852:	95 95       	asr	r25
 854:	87 95       	ror	r24
 856:	95 95       	asr	r25
 858:	87 95       	ror	r24
 85a:	95 95       	asr	r25
 85c:	87 95       	ror	r24
}
 85e:	82 2b       	or	r24, r18
 860:	08 95       	ret

00000862 <writeEEPROM(unsigned int, unsigned char)>:

uint8_t rawReadEEPROM() {
  return (PINB << 3) | (PIND >> 5);
}

void writeEEPROM(uint16_t address, uint8_t data) {
 862:	0f 93       	push	r16
 864:	1f 93       	push	r17
 866:	cf 93       	push	r28
 868:	8c 01       	movw	r16, r24
 86a:	c6 2f       	mov	r28, r22
  setAddress(address, false);
 86c:	60 e0       	ldi	r22, 0x00	; 0
 86e:	0e 94 b6 03 	call	0x76c	; 0x76c <setAddress(unsigned int, bool)>

  // set data pins direction as ouput
  DDRD |= B11100000;
 872:	8a b1       	in	r24, 0x0a	; 10
 874:	80 6e       	ori	r24, 0xE0	; 224
 876:	8a b9       	out	0x0a, r24	; 10
  DDRB |= B00011111;
 878:	84 b1       	in	r24, 0x04	; 4
 87a:	8f 61       	ori	r24, 0x1F	; 31
 87c:	84 b9       	out	0x04, r24	; 4

  // clear data bits, and then set
  PORTD = (PORTD & B00011111) | (data << 5);
 87e:	9b b1       	in	r25, 0x0b	; 11
 880:	9f 71       	andi	r25, 0x1F	; 31
 882:	2c 2f       	mov	r18, r28
 884:	30 e0       	ldi	r19, 0x00	; 0
 886:	8c 2f       	mov	r24, r28
 888:	82 95       	swap	r24
 88a:	88 0f       	add	r24, r24
 88c:	80 7e       	andi	r24, 0xE0	; 224
 88e:	98 2b       	or	r25, r24
 890:	9b b9       	out	0x0b, r25	; 11
  PORTB = (PORTB & B11100000) | (data >> 3);
 892:	85 b1       	in	r24, 0x05	; 5
 894:	80 7e       	andi	r24, 0xE0	; 224
 896:	35 95       	asr	r19
 898:	27 95       	ror	r18
 89a:	35 95       	asr	r19
 89c:	27 95       	ror	r18
 89e:	35 95       	asr	r19
 8a0:	27 95       	ror	r18
 8a2:	82 2b       	or	r24, r18
 8a4:	85 b9       	out	0x05, r24	; 5

  // toggle write enable
  PORTB &= ~_BV(PB5);
 8a6:	85 b1       	in	r24, 0x05	; 5
 8a8:	8f 7d       	andi	r24, 0xDF	; 223
 8aa:	85 b9       	out	0x05, r24	; 5
  // delay 2 clock cycle (125 ns)
  asm volatile("nop\n\tnop\n\t");
 8ac:	00 00       	nop
 8ae:	00 00       	nop
  PORTB |= _BV(PB5);
 8b0:	85 b1       	in	r24, 0x05	; 5
 8b2:	80 62       	ori	r24, 0x20	; 32
 8b4:	85 b9       	out	0x05, r24	; 5

  uint8_t r = readEEPROM(address);
 8b6:	c8 01       	movw	r24, r16
 8b8:	0e 94 0d 04 	call	0x81a	; 0x81a <readEEPROM(unsigned int)>
  while (r != data) {
 8bc:	8c 17       	cp	r24, r28
 8be:	b1 f0       	breq	.+44     	; 0x8ec <writeEEPROM(unsigned int, unsigned char)+0x8a>
  //return ((PINB & B00011111) << 3) + ((PIND & B11100000) >> 5);
  return (PINB << 3) | (PIND >> 5);
}

uint8_t rawReadEEPROM() {
  return (PINB << 3) | (PIND >> 5);
 8c0:	83 b1       	in	r24, 0x03	; 3
 8c2:	90 e0       	ldi	r25, 0x00	; 0
 8c4:	88 0f       	add	r24, r24
 8c6:	99 1f       	adc	r25, r25
 8c8:	88 0f       	add	r24, r24
 8ca:	99 1f       	adc	r25, r25
 8cc:	88 0f       	add	r24, r24
 8ce:	99 1f       	adc	r25, r25
 8d0:	29 b1       	in	r18, 0x09	; 9
 8d2:	30 e0       	ldi	r19, 0x00	; 0
 8d4:	35 95       	asr	r19
 8d6:	27 95       	ror	r18
 8d8:	35 95       	asr	r19
 8da:	27 95       	ror	r18
 8dc:	35 95       	asr	r19
 8de:	27 95       	ror	r18
 8e0:	35 95       	asr	r19
 8e2:	27 95       	ror	r18
 8e4:	35 95       	asr	r19
 8e6:	27 95       	ror	r18
 8e8:	82 2b       	or	r24, r18
 8ea:	e8 cf       	rjmp	.-48     	; 0x8bc <writeEEPROM(unsigned int, unsigned char)+0x5a>

  uint8_t r = readEEPROM(address);
  while (r != data) {
    r = rawReadEEPROM();
  }
}
 8ec:	cf 91       	pop	r28
 8ee:	1f 91       	pop	r17
 8f0:	0f 91       	pop	r16
 8f2:	08 95       	ret

000008f4 <disableWriteProtection()>:
    bufferSerial();
  }
}

void disableWriteProtection() {
  writeEEPROM(0x5555, 0xAA);
 8f4:	6a ea       	ldi	r22, 0xAA	; 170
 8f6:	85 e5       	ldi	r24, 0x55	; 85
 8f8:	95 e5       	ldi	r25, 0x55	; 85
 8fa:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x2AAA, 0x55);
 8fe:	65 e5       	ldi	r22, 0x55	; 85
 900:	8a ea       	ldi	r24, 0xAA	; 170
 902:	9a e2       	ldi	r25, 0x2A	; 42
 904:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0x80);
 908:	60 e8       	ldi	r22, 0x80	; 128
 90a:	85 e5       	ldi	r24, 0x55	; 85
 90c:	95 e5       	ldi	r25, 0x55	; 85
 90e:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0xAA);
 912:	6a ea       	ldi	r22, 0xAA	; 170
 914:	85 e5       	ldi	r24, 0x55	; 85
 916:	95 e5       	ldi	r25, 0x55	; 85
 918:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x2AAA, 0x55);
 91c:	65 e5       	ldi	r22, 0x55	; 85
 91e:	8a ea       	ldi	r24, 0xAA	; 170
 920:	9a e2       	ldi	r25, 0x2A	; 42
 922:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0x20);
 926:	60 e2       	ldi	r22, 0x20	; 32
 928:	85 e5       	ldi	r24, 0x55	; 85
 92a:	95 e5       	ldi	r25, 0x55	; 85
 92c:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  delay(1);
 930:	61 e0       	ldi	r22, 0x01	; 1
 932:	70 e0       	ldi	r23, 0x00	; 0
 934:	80 e0       	ldi	r24, 0x00	; 0
 936:	90 e0       	ldi	r25, 0x00	; 0
 938:	0e 94 92 01 	call	0x324	; 0x324 <delay>
}
 93c:	08 95       	ret

0000093e <eraseEEPROM()>:
  writeEEPROM(0x5555, 0xA0);
  delay(1);
}

void eraseEEPROM() {
  writeEEPROM(0x5555, 0xAA);
 93e:	6a ea       	ldi	r22, 0xAA	; 170
 940:	85 e5       	ldi	r24, 0x55	; 85
 942:	95 e5       	ldi	r25, 0x55	; 85
 944:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x2AAA, 0x55);
 948:	65 e5       	ldi	r22, 0x55	; 85
 94a:	8a ea       	ldi	r24, 0xAA	; 170
 94c:	9a e2       	ldi	r25, 0x2A	; 42
 94e:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0x80);
 952:	60 e8       	ldi	r22, 0x80	; 128
 954:	85 e5       	ldi	r24, 0x55	; 85
 956:	95 e5       	ldi	r25, 0x55	; 85
 958:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0xAA);
 95c:	6a ea       	ldi	r22, 0xAA	; 170
 95e:	85 e5       	ldi	r24, 0x55	; 85
 960:	95 e5       	ldi	r25, 0x55	; 85
 962:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x2AAA, 0x55);
 966:	65 e5       	ldi	r22, 0x55	; 85
 968:	8a ea       	ldi	r24, 0xAA	; 170
 96a:	9a e2       	ldi	r25, 0x2A	; 42
 96c:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  writeEEPROM(0x5555, 0x10);
 970:	60 e1       	ldi	r22, 0x10	; 16
 972:	85 e5       	ldi	r24, 0x55	; 85
 974:	95 e5       	ldi	r25, 0x55	; 85
 976:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
  delay(20);  // wait for chip erase
 97a:	64 e1       	ldi	r22, 0x14	; 20
 97c:	70 e0       	ldi	r23, 0x00	; 0
 97e:	80 e0       	ldi	r24, 0x00	; 0
 980:	90 e0       	ldi	r25, 0x00	; 0
 982:	0e 94 92 01 	call	0x324	; 0x324 <delay>
  disableWriteProtection();
 986:	0e 94 7a 04 	call	0x8f4	; 0x8f4 <disableWriteProtection()>
}
 98a:	08 95       	ret

0000098c <bufferSerial()>:
uint8_t bufferCount() {
  return bufferEndIndex - bufferStartIndex;
}

void bufferSerial() {
  if (Serial.available() == 0) return;
 98c:	8a e6       	ldi	r24, 0x6A	; 106
 98e:	91 e0       	ldi	r25, 0x01	; 1
 990:	0e 94 8f 02 	call	0x51e	; 0x51e <HardwareSerial::available()>
 994:	89 2b       	or	r24, r25
 996:	69 f0       	breq	.+26     	; 0x9b2 <bufferSerial()+0x26>
  buffer[bufferEndIndex] = value;
  bufferEndIndex++;
}

uint8_t bufferCount() {
  return bufferEndIndex - bufferStartIndex;
 998:	80 91 20 01 	lds	r24, 0x0120	; 0x800120 <__data_end>
}

void bufferSerial() {
  if (Serial.available() == 0) return;
  if (bufferCount() == 255) return;
 99c:	8f 3f       	cpi	r24, 0xFF	; 255
 99e:	49 f0       	breq	.+18     	; 0x9b2 <bufferSerial()+0x26>
  bufferWrite(Serial.read());
 9a0:	8a e6       	ldi	r24, 0x6A	; 106
 9a2:	91 e0       	ldi	r25, 0x01	; 1
 9a4:	0e 94 6d 02 	call	0x4da	; 0x4da <HardwareSerial::read()>
  bufferStartIndex++;
  return value;
}

void bufferWrite(uint8_t value) {
  buffer[bufferEndIndex] = value;
 9a8:	80 91 20 01 	lds	r24, 0x0120	; 0x800120 <__data_end>
  bufferEndIndex++;
 9ac:	8f 5f       	subi	r24, 0xFF	; 255
 9ae:	80 93 20 01 	sts	0x0120, r24	; 0x800120 <__data_end>

void bufferSerial() {
  if (Serial.available() == 0) return;
  if (bufferCount() == 255) return;
  bufferWrite(Serial.read());
}
 9b2:	08 95       	ret

000009b4 <writePageEEPROM(unsigned int, unsigned char)>:
  while (r != data) {
    r = rawReadEEPROM();
  }
}

void writePageEEPROM(uint16_t startAddress, uint8_t count) {
 9b4:	ff 92       	push	r15
 9b6:	0f 93       	push	r16
 9b8:	1f 93       	push	r17
 9ba:	cf 93       	push	r28
 9bc:	df 93       	push	r29
 9be:	ec 01       	movw	r28, r24
 9c0:	06 2f       	mov	r16, r22
  uint8_t offset = B00111111 & startAddress; // lower 6 bits
 9c2:	8f 73       	andi	r24, 0x3F	; 63
 9c4:	f8 2e       	mov	r15, r24

  setAddress(startAddress, false);
 9c6:	60 e0       	ldi	r22, 0x00	; 0
 9c8:	ce 01       	movw	r24, r28
 9ca:	0e 94 b6 03 	call	0x76c	; 0x76c <setAddress(unsigned int, bool)>

  // set data pins direction as ouput
  DDRD |= B11100000;
 9ce:	8a b1       	in	r24, 0x0a	; 10
 9d0:	80 6e       	ori	r24, 0xE0	; 224
 9d2:	8a b9       	out	0x0a, r24	; 10
  DDRB |= B00011111;
 9d4:	84 b1       	in	r24, 0x04	; 4
 9d6:	8f 61       	ori	r24, 0x1F	; 31
 9d8:	84 b9       	out	0x04, r24	; 4

  uint8_t i = 0;
 9da:	10 e0       	ldi	r17, 0x00	; 0

  while (true) {
    // clear data bits, and then set
    PORTD = (PORTD & B00011111) | (page[offset + i] << 5);
 9dc:	8b b1       	in	r24, 0x0b	; 11
 9de:	8f 71       	andi	r24, 0x1F	; 31
 9e0:	4f 2d       	mov	r20, r15
 9e2:	50 e0       	ldi	r21, 0x00	; 0
 9e4:	fa 01       	movw	r30, r20
 9e6:	e1 0f       	add	r30, r17
 9e8:	f1 1d       	adc	r31, r1
 9ea:	ee 5d       	subi	r30, 0xDE	; 222
 9ec:	fe 4f       	sbci	r31, 0xFE	; 254
 9ee:	90 81       	ld	r25, Z
 9f0:	92 95       	swap	r25
 9f2:	99 0f       	add	r25, r25
 9f4:	90 7e       	andi	r25, 0xE0	; 224
 9f6:	89 2b       	or	r24, r25
 9f8:	8b b9       	out	0x0b, r24	; 11
    PORTB = (PORTB & B11100000) | (page[offset + i] >> 3);
 9fa:	95 b1       	in	r25, 0x05	; 5
 9fc:	90 7e       	andi	r25, 0xE0	; 224
 9fe:	20 81       	ld	r18, Z
 a00:	30 e0       	ldi	r19, 0x00	; 0
 a02:	35 95       	asr	r19
 a04:	27 95       	ror	r18
 a06:	35 95       	asr	r19
 a08:	27 95       	ror	r18
 a0a:	35 95       	asr	r19
 a0c:	27 95       	ror	r18
 a0e:	92 2b       	or	r25, r18
 a10:	95 b9       	out	0x05, r25	; 5

    // toggle write enable
    PORTB &= ~_BV(PB5);
 a12:	85 b1       	in	r24, 0x05	; 5
 a14:	8f 7d       	andi	r24, 0xDF	; 223
 a16:	85 b9       	out	0x05, r24	; 5
    // delay 2 clock cycle (125 ns)
    asm volatile("nop\n\tnop\n\t");
 a18:	00 00       	nop
 a1a:	00 00       	nop
    PORTB |= _BV(PB5);
 a1c:	85 b1       	in	r24, 0x05	; 5
 a1e:	80 62       	ori	r24, 0x20	; 32
 a20:	85 b9       	out	0x05, r24	; 5

    i++;
 a22:	1f 5f       	subi	r17, 0xFF	; 255

    if (i >= count) break;
 a24:	10 17       	cp	r17, r16
 a26:	38 f4       	brcc	.+14     	; 0xa36 <writePageEEPROM(unsigned int, unsigned char)+0x82>
    setAddress(startAddress + i, false);
 a28:	60 e0       	ldi	r22, 0x00	; 0
 a2a:	ce 01       	movw	r24, r28
 a2c:	81 0f       	add	r24, r17
 a2e:	91 1d       	adc	r25, r1
 a30:	0e 94 b6 03 	call	0x76c	; 0x76c <setAddress(unsigned int, bool)>
 a34:	d3 cf       	rjmp	.-90     	; 0x9dc <writePageEEPROM(unsigned int, unsigned char)+0x28>
  }

  uint8_t lastData = page[offset + count - 1];
 a36:	80 2f       	mov	r24, r16
 a38:	90 e0       	ldi	r25, 0x00	; 0
 a3a:	48 0f       	add	r20, r24
 a3c:	59 1f       	adc	r21, r25
 a3e:	fa 01       	movw	r30, r20
 a40:	ef 5d       	subi	r30, 0xDF	; 223
 a42:	fe 4f       	sbci	r31, 0xFE	; 254
 a44:	10 81       	ld	r17, Z
  uint8_t r = readEEPROM(startAddress + count - 1);
 a46:	8c 0f       	add	r24, r28
 a48:	9d 1f       	adc	r25, r29
 a4a:	01 97       	sbiw	r24, 0x01	; 1
 a4c:	0e 94 0d 04 	call	0x81a	; 0x81a <readEEPROM(unsigned int)>
 a50:	c8 2f       	mov	r28, r24

  while (r != lastData) { // wait until the last byte is read back correctly, indicates success
 a52:	c1 17       	cp	r28, r17
 a54:	c1 f0       	breq	.+48     	; 0xa86 <writePageEEPROM(unsigned int, unsigned char)+0xd2>
  //return ((PINB & B00011111) << 3) + ((PIND & B11100000) >> 5);
  return (PINB << 3) | (PIND >> 5);
}

uint8_t rawReadEEPROM() {
  return (PINB << 3) | (PIND >> 5);
 a56:	83 b1       	in	r24, 0x03	; 3
 a58:	90 e0       	ldi	r25, 0x00	; 0
 a5a:	88 0f       	add	r24, r24
 a5c:	99 1f       	adc	r25, r25
 a5e:	88 0f       	add	r24, r24
 a60:	99 1f       	adc	r25, r25
 a62:	88 0f       	add	r24, r24
 a64:	99 1f       	adc	r25, r25
 a66:	c9 b1       	in	r28, 0x09	; 9
 a68:	d0 e0       	ldi	r29, 0x00	; 0
 a6a:	d5 95       	asr	r29
 a6c:	c7 95       	ror	r28
 a6e:	d5 95       	asr	r29
 a70:	c7 95       	ror	r28
 a72:	d5 95       	asr	r29
 a74:	c7 95       	ror	r28
 a76:	d5 95       	asr	r29
 a78:	c7 95       	ror	r28
 a7a:	d5 95       	asr	r29
 a7c:	c7 95       	ror	r28
 a7e:	c8 2b       	or	r28, r24
  uint8_t lastData = page[offset + count - 1];
  uint8_t r = readEEPROM(startAddress + count - 1);

  while (r != lastData) { // wait until the last byte is read back correctly, indicates success
    r = rawReadEEPROM(); // reads EEPROM without setting address, faster
    bufferSerial();
 a80:	0e 94 c6 04 	call	0x98c	; 0x98c <bufferSerial()>
 a84:	e6 cf       	rjmp	.-52     	; 0xa52 <writePageEEPROM(unsigned int, unsigned char)+0x9e>
  }
}
 a86:	df 91       	pop	r29
 a88:	cf 91       	pop	r28
 a8a:	1f 91       	pop	r17
 a8c:	0f 91       	pop	r16
 a8e:	ff 90       	pop	r15
 a90:	08 95       	ret

00000a92 <Print::println()>:
    void clearWriteError() { setWriteError(0); }
  
    virtual size_t write(uint8_t) = 0;
    size_t write(const char *str) {
      if (str == NULL) return 0;
      return write((const uint8_t *)str, strlen(str));
 a92:	dc 01       	movw	r26, r24
 a94:	ed 91       	ld	r30, X+
 a96:	fc 91       	ld	r31, X
 a98:	02 80       	ldd	r0, Z+2	; 0x02
 a9a:	f3 81       	ldd	r31, Z+3	; 0x03
 a9c:	e0 2d       	mov	r30, r0
 a9e:	42 e0       	ldi	r20, 0x02	; 2
 aa0:	50 e0       	ldi	r21, 0x00	; 0
 aa2:	6c e1       	ldi	r22, 0x1C	; 28
 aa4:	71 e0       	ldi	r23, 0x01	; 1
 aa6:	09 95       	icall
}

size_t Print::println(void)
{
  return write("\r\n");
}
 aa8:	08 95       	ret

00000aaa <Print::println(char)>:
  n += println();
  return n;
}

size_t Print::println(char c)
{
 aaa:	0f 93       	push	r16
 aac:	1f 93       	push	r17
 aae:	cf 93       	push	r28
 ab0:	df 93       	push	r29
 ab2:	ec 01       	movw	r28, r24
  size_t n = print(c);
 ab4:	0e 94 cb 01 	call	0x396	; 0x396 <Print::print(char)>
 ab8:	8c 01       	movw	r16, r24
  n += println();
 aba:	ce 01       	movw	r24, r28
 abc:	0e 94 49 05 	call	0xa92	; 0xa92 <Print::println()>
  return n;
}
 ac0:	80 0f       	add	r24, r16
 ac2:	91 1f       	adc	r25, r17
 ac4:	df 91       	pop	r29
 ac6:	cf 91       	pop	r28
 ac8:	1f 91       	pop	r17
 aca:	0f 91       	pop	r16
 acc:	08 95       	ret

00000ace <loop>:
  setAddress(0, false);  // disable output

  Serial.begin(115200);
}

void loop() {
 ace:	cf 93       	push	r28
 ad0:	df 93       	push	r29
  //   bufferWrite(Serial.read());
  // }

  // if (bufferCount() == 0) return;

  if (Serial.available() == 0) return;
 ad2:	8a e6       	ldi	r24, 0x6A	; 106
 ad4:	91 e0       	ldi	r25, 0x01	; 1
 ad6:	0e 94 8f 02 	call	0x51e	; 0x51e <HardwareSerial::available()>
 ada:	89 2b       	or	r24, r25
 adc:	19 f4       	brne	.+6      	; 0xae4 <loop+0x16>
      return;
    }

    address++;
  }
 ade:	df 91       	pop	r29
 ae0:	cf 91       	pop	r28
 ae2:	08 95       	ret

  // if (bufferCount() == 0) return;

  if (Serial.available() == 0) return;

  uint8_t input = Serial.read();// bufferRead();
 ae4:	8a e6       	ldi	r24, 0x6A	; 106
 ae6:	91 e0       	ldi	r25, 0x01	; 1
 ae8:	0e 94 6d 02 	call	0x4da	; 0x4da <HardwareSerial::read()>
 aec:	c8 2f       	mov	r28, r24

  if (currentState == State::Idle) {  // input is a command character
 aee:	80 91 69 01 	lds	r24, 0x0169	; 0x800169 <currentState>
 af2:	81 11       	cpse	r24, r1
 af4:	24 c0       	rjmp	.+72     	; 0xb3e <loop+0x70>
    bool isValidCommand = false;
    for (uint8_t i = 0; i < sizeof(validCommands); i++) {
 af6:	85 30       	cpi	r24, 0x05	; 5
 af8:	a0 f4       	brcc	.+40     	; 0xb22 <loop+0x54>
      if (validCommands[i] != (char)input) continue;
 afa:	28 2f       	mov	r18, r24
 afc:	30 e0       	ldi	r19, 0x00	; 0
 afe:	f9 01       	movw	r30, r18
 b00:	eb 5f       	subi	r30, 0xFB	; 251
 b02:	fe 4f       	sbci	r31, 0xFE	; 254
 b04:	90 81       	ld	r25, Z
 b06:	9c 17       	cp	r25, r28
 b08:	11 f0       	breq	.+4      	; 0xb0e <loop+0x40>

  uint8_t input = Serial.read();// bufferRead();

  if (currentState == State::Idle) {  // input is a command character
    bool isValidCommand = false;
    for (uint8_t i = 0; i < sizeof(validCommands); i++) {
 b0a:	8f 5f       	subi	r24, 0xFF	; 255
 b0c:	f4 cf       	rjmp	.-24     	; 0xaf6 <loop+0x28>
      if (validCommands[i] != (char)input) continue;

      currentCommand = enumCommands[i];
 b0e:	20 50       	subi	r18, 0x00	; 0
 b10:	3f 4f       	sbci	r19, 0xFF	; 255
 b12:	f9 01       	movw	r30, r18
 b14:	80 81       	ld	r24, Z
 b16:	80 93 68 01 	sts	0x0168, r24	; 0x800168 <currentCommand>
      Serial.println((char)input);
      resetState();
      return;
    }

    currentState = State::Address;
 b1a:	81 e0       	ldi	r24, 0x01	; 1
 b1c:	80 93 69 01 	sts	0x0169, r24	; 0x800169 <currentState>
 b20:	de cf       	rjmp	.-68     	; 0xade <loop+0x10>
      isValidCommand = true;
      break;
    }

    if (!isValidCommand) {
      Serial.print(F("Invalid command: "));
 b22:	68 e6       	ldi	r22, 0x68	; 104
 b24:	70 e0       	ldi	r23, 0x00	; 0
 b26:	8a e6       	ldi	r24, 0x6A	; 106
 b28:	91 e0       	ldi	r25, 0x01	; 1
 b2a:	0e 94 d3 01 	call	0x3a6	; 0x3a6 <Print::print(__FlashStringHelper const*)>
      Serial.println((char)input);
 b2e:	6c 2f       	mov	r22, r28
 b30:	8a e6       	ldi	r24, 0x6A	; 106
 b32:	91 e0       	ldi	r25, 0x01	; 1
 b34:	0e 94 55 05 	call	0xaaa	; 0xaaa <Print::println(char)>
      resetState();
 b38:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 b3c:	d0 cf       	rjmp	.-96     	; 0xade <loop+0x10>
      return;
    }

    currentState = State::Address;
  } else if (currentState == State::Address) {
 b3e:	81 30       	cpi	r24, 0x01	; 1
 b40:	09 f4       	brne	.+2      	; 0xb44 <loop+0x76>
 b42:	66 c0       	rjmp	.+204    	; 0xc10 <loop+0x142>
      }

      currentState = State::Parameter;
      return;
    }
  } else if (currentState == State::Parameter) {
 b44:	82 30       	cpi	r24, 0x02	; 2
 b46:	59 f6       	brne	.-106    	; 0xade <loop+0x10>
    if (byteCount == 2) {
 b48:	80 91 66 01 	lds	r24, 0x0166	; 0x800166 <byteCount>
 b4c:	90 91 67 01 	lds	r25, 0x0167	; 0x800167 <byteCount+0x1>
 b50:	82 30       	cpi	r24, 0x02	; 2
 b52:	91 05       	cpc	r25, r1
 b54:	09 f4       	brne	.+2      	; 0xb58 <loop+0x8a>
 b56:	b9 c0       	rjmp	.+370    	; 0xcca <loop+0x1fc>
        writeEEPROM(address, parameter);
        Serial.write(Serial.available());
        resetState();
      }
      return;
    } else if (byteCount == 3) {
 b58:	83 30       	cpi	r24, 0x03	; 3
 b5a:	91 05       	cpc	r25, r1
 b5c:	09 f4       	brne	.+2      	; 0xb60 <loop+0x92>
 b5e:	e0 c0       	rjmp	.+448    	; 0xd20 <loop+0x252>
      }

      return;
    }

    if (currentCommand != Command::Load) return;
 b60:	20 91 68 01 	lds	r18, 0x0168	; 0x800168 <currentCommand>
 b64:	23 30       	cpi	r18, 0x03	; 3
 b66:	09 f0       	breq	.+2      	; 0xb6a <loop+0x9c>
 b68:	ba cf       	rjmp	.-140    	; 0xade <loop+0x10>

    uint8_t pageAddress = address & (PAGE_SIZE - 1);
 b6a:	d0 91 64 01 	lds	r29, 0x0164	; 0x800164 <address>
 b6e:	df 73       	andi	r29, 0x3F	; 63

    page[pageAddress] = input;
 b70:	ed 2f       	mov	r30, r29
 b72:	f0 e0       	ldi	r31, 0x00	; 0
 b74:	ee 5d       	subi	r30, 0xDE	; 222
 b76:	fe 4f       	sbci	r31, 0xFE	; 254
 b78:	c0 83       	st	Z, r28
    pageCount++;
 b7a:	20 91 21 01 	lds	r18, 0x0121	; 0x800121 <pageCount>
 b7e:	2f 5f       	subi	r18, 0xFF	; 255
 b80:	20 93 21 01 	sts	0x0121, r18	; 0x800121 <pageCount>
    byteCount++;
 b84:	01 96       	adiw	r24, 0x01	; 1
 b86:	90 93 67 01 	sts	0x0167, r25	; 0x800167 <byteCount+0x1>
 b8a:	80 93 66 01 	sts	0x0166, r24	; 0x800166 <byteCount>

    Serial.write(Serial.available()); // Acknowledge byte read
 b8e:	8a e6       	ldi	r24, 0x6A	; 106
 b90:	91 e0       	ldi	r25, 0x01	; 1
 b92:	0e 94 8f 02 	call	0x51e	; 0x51e <HardwareSerial::available()>
    virtual void flush(void);
    virtual size_t write(uint8_t);
    inline size_t write(unsigned long n) { return write((uint8_t)n); }
    inline size_t write(long n) { return write((uint8_t)n); }
    inline size_t write(unsigned int n) { return write((uint8_t)n); }
    inline size_t write(int n) { return write((uint8_t)n); }
 b96:	e0 91 6a 01 	lds	r30, 0x016A	; 0x80016a <Serial>
 b9a:	f0 91 6b 01 	lds	r31, 0x016B	; 0x80016b <Serial+0x1>
 b9e:	01 90       	ld	r0, Z+
 ba0:	f0 81       	ld	r31, Z
 ba2:	e0 2d       	mov	r30, r0
 ba4:	68 2f       	mov	r22, r24
 ba6:	8a e6       	ldi	r24, 0x6A	; 106
 ba8:	91 e0       	ldi	r25, 0x01	; 1
 baa:	09 95       	icall

    // reached end of page OR end of load, write page
    if (pageAddress == (PAGE_SIZE - 1) || byteCount >= parameter + 4) {
 bac:	df 33       	cpi	r29, 0x3F	; 63
 bae:	61 f0       	breq	.+24     	; 0xbc8 <loop+0xfa>
 bb0:	80 91 62 01 	lds	r24, 0x0162	; 0x800162 <parameter>
 bb4:	90 91 63 01 	lds	r25, 0x0163	; 0x800163 <parameter+0x1>
 bb8:	04 96       	adiw	r24, 0x04	; 4
 bba:	20 91 66 01 	lds	r18, 0x0166	; 0x800166 <byteCount>
 bbe:	30 91 67 01 	lds	r19, 0x0167	; 0x800167 <byteCount+0x1>
 bc2:	28 17       	cp	r18, r24
 bc4:	39 07       	cpc	r19, r25
 bc6:	68 f0       	brcs	.+26     	; 0xbe2 <loop+0x114>
      writePageEEPROM((address + 1) - pageCount, pageCount);
 bc8:	60 91 21 01 	lds	r22, 0x0121	; 0x800121 <pageCount>
 bcc:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 bd0:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 bd4:	86 1b       	sub	r24, r22
 bd6:	91 09       	sbc	r25, r1
 bd8:	01 96       	adiw	r24, 0x01	; 1
 bda:	0e 94 da 04 	call	0x9b4	; 0x9b4 <writePageEEPROM(unsigned int, unsigned char)>
      pageCount = 0;
 bde:	10 92 21 01 	sts	0x0121, r1	; 0x800121 <pageCount>
    }

    if (byteCount >= parameter + 4) {
 be2:	80 91 62 01 	lds	r24, 0x0162	; 0x800162 <parameter>
 be6:	90 91 63 01 	lds	r25, 0x0163	; 0x800163 <parameter+0x1>
 bea:	04 96       	adiw	r24, 0x04	; 4
 bec:	20 91 66 01 	lds	r18, 0x0166	; 0x800166 <byteCount>
 bf0:	30 91 67 01 	lds	r19, 0x0167	; 0x800167 <byteCount+0x1>
 bf4:	28 17       	cp	r18, r24
 bf6:	39 07       	cpc	r19, r25
 bf8:	08 f0       	brcs	.+2      	; 0xbfc <loop+0x12e>
 bfa:	bf c0       	rjmp	.+382    	; 0xd7a <loop+0x2ac>
      resetState();
      return;
    }

    address++;
 bfc:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 c00:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 c04:	01 96       	adiw	r24, 0x01	; 1
 c06:	90 93 65 01 	sts	0x0165, r25	; 0x800165 <address+0x1>
 c0a:	80 93 64 01 	sts	0x0164, r24	; 0x800164 <address>
 c0e:	67 cf       	rjmp	.-306    	; 0xade <loop+0x10>
      return;
    }

    currentState = State::Address;
  } else if (currentState == State::Address) {
    if (byteCount == 0) {
 c10:	20 91 66 01 	lds	r18, 0x0166	; 0x800166 <byteCount>
 c14:	30 91 67 01 	lds	r19, 0x0167	; 0x800167 <byteCount+0x1>
 c18:	21 15       	cp	r18, r1
 c1a:	31 05       	cpc	r19, r1
 c1c:	e9 f0       	breq	.+58     	; 0xc58 <loop+0x18a>
      address |= input;  // read in upper byte
      address <<= 8;
      byteCount++;
      return;
    } else if (byteCount == 1) {
 c1e:	21 30       	cpi	r18, 0x01	; 1
 c20:	31 05       	cpc	r19, r1
 c22:	09 f0       	breq	.+2      	; 0xc26 <loop+0x158>
 c24:	5c cf       	rjmp	.-328    	; 0xade <loop+0x10>
      address |= input;  // read in lower byte
 c26:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 c2a:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 c2e:	8c 2b       	or	r24, r28
 c30:	90 93 65 01 	sts	0x0165, r25	; 0x800165 <address+0x1>
 c34:	80 93 64 01 	sts	0x0164, r24	; 0x800164 <address>
      byteCount++;
 c38:	2f 5f       	subi	r18, 0xFF	; 255
 c3a:	3f 4f       	sbci	r19, 0xFF	; 255
 c3c:	30 93 67 01 	sts	0x0167, r19	; 0x800167 <byteCount+0x1>
 c40:	20 93 66 01 	sts	0x0166, r18	; 0x800166 <byteCount>

      if (currentCommand == Command::Read) {
 c44:	20 91 68 01 	lds	r18, 0x0168	; 0x800168 <currentCommand>
 c48:	21 30       	cpi	r18, 0x01	; 1
 c4a:	b1 f0       	breq	.+44     	; 0xc78 <loop+0x1aa>
        Serial.write(readEEPROM(address));
        resetState();
        return;
      } else if (currentCommand == Command::Erase) {
 c4c:	25 30       	cpi	r18, 0x05	; 5
 c4e:	f1 f0       	breq	.+60     	; 0xc8c <loop+0x1be>
        }
        resetState();
        return;
      }

      currentState = State::Parameter;
 c50:	82 e0       	ldi	r24, 0x02	; 2
 c52:	80 93 69 01 	sts	0x0169, r24	; 0x800169 <currentState>
 c56:	43 cf       	rjmp	.-378    	; 0xade <loop+0x10>
    }

    currentState = State::Address;
  } else if (currentState == State::Address) {
    if (byteCount == 0) {
      address |= input;  // read in upper byte
 c58:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 c5c:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 c60:	8c 2b       	or	r24, r28
      address <<= 8;
 c62:	10 92 64 01 	sts	0x0164, r1	; 0x800164 <address>
 c66:	80 93 65 01 	sts	0x0165, r24	; 0x800165 <address+0x1>
      byteCount++;
 c6a:	2f 5f       	subi	r18, 0xFF	; 255
 c6c:	3f 4f       	sbci	r19, 0xFF	; 255
 c6e:	30 93 67 01 	sts	0x0167, r19	; 0x800167 <byteCount+0x1>
 c72:	20 93 66 01 	sts	0x0166, r18	; 0x800166 <byteCount>
 c76:	33 cf       	rjmp	.-410    	; 0xade <loop+0x10>
    } else if (byteCount == 1) {
      address |= input;  // read in lower byte
      byteCount++;

      if (currentCommand == Command::Read) {
        Serial.write(readEEPROM(address));
 c78:	0e 94 0d 04 	call	0x81a	; 0x81a <readEEPROM(unsigned int)>
 c7c:	68 2f       	mov	r22, r24
 c7e:	8a e6       	ldi	r24, 0x6A	; 106
 c80:	91 e0       	ldi	r25, 0x01	; 1
 c82:	0e 94 2a 03 	call	0x654	; 0x654 <HardwareSerial::write(unsigned char)>
        resetState();
 c86:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 c8a:	29 cf       	rjmp	.-430    	; 0xade <loop+0x10>
        return;
      } else if (currentCommand == Command::Erase) {
        if (address != ERASE_CONFIRMATION) {
 c8c:	8f 3e       	cpi	r24, 0xEF	; 239
 c8e:	9e 4b       	sbci	r25, 0xBE	; 190
 c90:	71 f0       	breq	.+28     	; 0xcae <loop+0x1e0>
 c92:	e0 91 6a 01 	lds	r30, 0x016A	; 0x80016a <Serial>
 c96:	f0 91 6b 01 	lds	r31, 0x016B	; 0x80016b <Serial+0x1>
 c9a:	01 90       	ld	r0, Z+
 c9c:	f0 81       	ld	r31, Z
 c9e:	e0 2d       	mov	r30, r0
 ca0:	60 e0       	ldi	r22, 0x00	; 0
 ca2:	8a e6       	ldi	r24, 0x6A	; 106
 ca4:	91 e0       	ldi	r25, 0x01	; 1
 ca6:	09 95       	icall
          Serial.write(0);  // confirmation did not match
        } else {
          eraseEEPROM();
          Serial.write(1);
        }
        resetState();
 ca8:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 cac:	18 cf       	rjmp	.-464    	; 0xade <loop+0x10>
        return;
      } else if (currentCommand == Command::Erase) {
        if (address != ERASE_CONFIRMATION) {
          Serial.write(0);  // confirmation did not match
        } else {
          eraseEEPROM();
 cae:	0e 94 9f 04 	call	0x93e	; 0x93e <eraseEEPROM()>
 cb2:	e0 91 6a 01 	lds	r30, 0x016A	; 0x80016a <Serial>
 cb6:	f0 91 6b 01 	lds	r31, 0x016B	; 0x80016b <Serial+0x1>
 cba:	01 90       	ld	r0, Z+
 cbc:	f0 81       	ld	r31, Z
 cbe:	e0 2d       	mov	r30, r0
 cc0:	61 e0       	ldi	r22, 0x01	; 1
 cc2:	8a e6       	ldi	r24, 0x6A	; 106
 cc4:	91 e0       	ldi	r25, 0x01	; 1
 cc6:	09 95       	icall
 cc8:	ef cf       	rjmp	.-34     	; 0xca8 <loop+0x1da>
      currentState = State::Parameter;
      return;
    }
  } else if (currentState == State::Parameter) {
    if (byteCount == 2) {
      parameter |= input;
 cca:	60 91 62 01 	lds	r22, 0x0162	; 0x800162 <parameter>
 cce:	70 91 63 01 	lds	r23, 0x0163	; 0x800163 <parameter+0x1>
 cd2:	6c 2b       	or	r22, r28
 cd4:	70 93 63 01 	sts	0x0163, r23	; 0x800163 <parameter+0x1>
 cd8:	60 93 62 01 	sts	0x0162, r22	; 0x800162 <parameter>
      byteCount++;
 cdc:	01 96       	adiw	r24, 0x01	; 1
 cde:	90 93 67 01 	sts	0x0167, r25	; 0x800167 <byteCount+0x1>
 ce2:	80 93 66 01 	sts	0x0166, r24	; 0x800166 <byteCount>
      if (currentCommand == Command::Write) {
 ce6:	80 91 68 01 	lds	r24, 0x0168	; 0x800168 <currentCommand>
 cea:	82 30       	cpi	r24, 0x02	; 2
 cec:	09 f0       	breq	.+2      	; 0xcf0 <loop+0x222>
 cee:	f7 ce       	rjmp	.-530    	; 0xade <loop+0x10>
        writeEEPROM(address, parameter);
 cf0:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 cf4:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 cf8:	0e 94 31 04 	call	0x862	; 0x862 <writeEEPROM(unsigned int, unsigned char)>
        Serial.write(Serial.available());
 cfc:	8a e6       	ldi	r24, 0x6A	; 106
 cfe:	91 e0       	ldi	r25, 0x01	; 1
 d00:	0e 94 8f 02 	call	0x51e	; 0x51e <HardwareSerial::available()>
 d04:	e0 91 6a 01 	lds	r30, 0x016A	; 0x80016a <Serial>
 d08:	f0 91 6b 01 	lds	r31, 0x016B	; 0x80016b <Serial+0x1>
 d0c:	01 90       	ld	r0, Z+
 d0e:	f0 81       	ld	r31, Z
 d10:	e0 2d       	mov	r30, r0
 d12:	68 2f       	mov	r22, r24
 d14:	8a e6       	ldi	r24, 0x6A	; 106
 d16:	91 e0       	ldi	r25, 0x01	; 1
 d18:	09 95       	icall
        resetState();
 d1a:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 d1e:	df ce       	rjmp	.-578    	; 0xade <loop+0x10>
      }
      return;
    } else if (byteCount == 3) {
      parameter <<= 8;
 d20:	20 e0       	ldi	r18, 0x00	; 0
 d22:	30 91 62 01 	lds	r19, 0x0162	; 0x800162 <parameter>
      parameter |= input;
 d26:	2c 2b       	or	r18, r28
 d28:	30 93 63 01 	sts	0x0163, r19	; 0x800163 <parameter+0x1>
 d2c:	20 93 62 01 	sts	0x0162, r18	; 0x800162 <parameter>
      byteCount++;
 d30:	01 96       	adiw	r24, 0x01	; 1
 d32:	90 93 67 01 	sts	0x0167, r25	; 0x800167 <byteCount+0x1>
 d36:	80 93 66 01 	sts	0x0166, r24	; 0x800166 <byteCount>

      if (currentCommand == Command::Dump) {
 d3a:	80 91 68 01 	lds	r24, 0x0168	; 0x800168 <currentCommand>
 d3e:	84 30       	cpi	r24, 0x04	; 4
 d40:	09 f0       	breq	.+2      	; 0xd44 <loop+0x276>
 d42:	cd ce       	rjmp	.-614    	; 0xade <loop+0x10>
        for (unsigned int i = 0; i < parameter; i++) {
 d44:	d0 e0       	ldi	r29, 0x00	; 0
 d46:	c0 e0       	ldi	r28, 0x00	; 0
 d48:	80 91 62 01 	lds	r24, 0x0162	; 0x800162 <parameter>
 d4c:	90 91 63 01 	lds	r25, 0x0163	; 0x800163 <parameter+0x1>
 d50:	c8 17       	cp	r28, r24
 d52:	d9 07       	cpc	r29, r25
 d54:	78 f4       	brcc	.+30     	; 0xd74 <loop+0x2a6>
          Serial.write(readEEPROM(address + i));
 d56:	80 91 64 01 	lds	r24, 0x0164	; 0x800164 <address>
 d5a:	90 91 65 01 	lds	r25, 0x0165	; 0x800165 <address+0x1>
 d5e:	8c 0f       	add	r24, r28
 d60:	9d 1f       	adc	r25, r29
 d62:	0e 94 0d 04 	call	0x81a	; 0x81a <readEEPROM(unsigned int)>
 d66:	68 2f       	mov	r22, r24
 d68:	8a e6       	ldi	r24, 0x6A	; 106
 d6a:	91 e0       	ldi	r25, 0x01	; 1
 d6c:	0e 94 2a 03 	call	0x654	; 0x654 <HardwareSerial::write(unsigned char)>
      parameter <<= 8;
      parameter |= input;
      byteCount++;

      if (currentCommand == Command::Dump) {
        for (unsigned int i = 0; i < parameter; i++) {
 d70:	21 96       	adiw	r28, 0x01	; 1
 d72:	ea cf       	rjmp	.-44     	; 0xd48 <loop+0x27a>
          Serial.write(readEEPROM(address + i));
        }
        resetState();
 d74:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 d78:	b2 ce       	rjmp	.-668    	; 0xade <loop+0x10>
      writePageEEPROM((address + 1) - pageCount, pageCount);
      pageCount = 0;
    }

    if (byteCount >= parameter + 4) {
      resetState();
 d7a:	0e 94 a3 03 	call	0x746	; 0x746 <resetState()>
 d7e:	af ce       	rjmp	.-674    	; 0xade <loop+0x10>

00000d80 <__vector_16>:
#if defined(TIM0_OVF_vect)
ISR(TIM0_OVF_vect)
#else
ISR(TIMER0_OVF_vect)
#endif
{
 d80:	1f 92       	push	r1
 d82:	0f 92       	push	r0
 d84:	0f b6       	in	r0, 0x3f	; 63
 d86:	0f 92       	push	r0
 d88:	11 24       	eor	r1, r1
 d8a:	0f 93       	push	r16
 d8c:	1f 93       	push	r17
 d8e:	2f 93       	push	r18
 d90:	3f 93       	push	r19
 d92:	4f 93       	push	r20
 d94:	5f 93       	push	r21
 d96:	6f 93       	push	r22
 d98:	7f 93       	push	r23
 d9a:	8f 93       	push	r24
 d9c:	9f 93       	push	r25
 d9e:	af 93       	push	r26
 da0:	bf 93       	push	r27
	// copy these to local variables so they can be stored in registers
	// (volatile variables must be read from memory on every access)
	unsigned long m = timer0_millis;
 da2:	00 91 08 02 	lds	r16, 0x0208	; 0x800208 <timer0_millis>
 da6:	10 91 09 02 	lds	r17, 0x0209	; 0x800209 <timer0_millis+0x1>
 daa:	20 91 0a 02 	lds	r18, 0x020A	; 0x80020a <timer0_millis+0x2>
 dae:	30 91 0b 02 	lds	r19, 0x020B	; 0x80020b <timer0_millis+0x3>
	unsigned char f = timer0_fract;
 db2:	90 91 07 02 	lds	r25, 0x0207	; 0x800207 <timer0_fract>

	m += MILLIS_INC;
 db6:	b9 01       	movw	r22, r18
 db8:	a8 01       	movw	r20, r16
 dba:	4f 5f       	subi	r20, 0xFF	; 255
 dbc:	5f 4f       	sbci	r21, 0xFF	; 255
 dbe:	6f 4f       	sbci	r22, 0xFF	; 255
 dc0:	7f 4f       	sbci	r23, 0xFF	; 255
	f += FRACT_INC;
 dc2:	83 e0       	ldi	r24, 0x03	; 3
 dc4:	89 0f       	add	r24, r25
	if (f >= FRACT_MAX) {
 dc6:	8d 37       	cpi	r24, 0x7D	; 125
 dc8:	40 f0       	brcs	.+16     	; 0xdda <__vector_16+0x5a>
		f -= FRACT_MAX;
 dca:	86 e8       	ldi	r24, 0x86	; 134
 dcc:	89 0f       	add	r24, r25
		m += 1;
 dce:	b9 01       	movw	r22, r18
 dd0:	a8 01       	movw	r20, r16
 dd2:	4e 5f       	subi	r20, 0xFE	; 254
 dd4:	5f 4f       	sbci	r21, 0xFF	; 255
 dd6:	6f 4f       	sbci	r22, 0xFF	; 255
 dd8:	7f 4f       	sbci	r23, 0xFF	; 255
	}

	timer0_fract = f;
 dda:	80 93 07 02 	sts	0x0207, r24	; 0x800207 <timer0_fract>
	timer0_millis = m;
 dde:	40 93 08 02 	sts	0x0208, r20	; 0x800208 <timer0_millis>
 de2:	50 93 09 02 	sts	0x0209, r21	; 0x800209 <timer0_millis+0x1>
 de6:	60 93 0a 02 	sts	0x020A, r22	; 0x80020a <timer0_millis+0x2>
 dea:	70 93 0b 02 	sts	0x020B, r23	; 0x80020b <timer0_millis+0x3>
	timer0_overflow_count++;
 dee:	80 91 0c 02 	lds	r24, 0x020C	; 0x80020c <timer0_overflow_count>
 df2:	90 91 0d 02 	lds	r25, 0x020D	; 0x80020d <timer0_overflow_count+0x1>
 df6:	a0 91 0e 02 	lds	r26, 0x020E	; 0x80020e <timer0_overflow_count+0x2>
 dfa:	b0 91 0f 02 	lds	r27, 0x020F	; 0x80020f <timer0_overflow_count+0x3>
 dfe:	01 96       	adiw	r24, 0x01	; 1
 e00:	a1 1d       	adc	r26, r1
 e02:	b1 1d       	adc	r27, r1
 e04:	80 93 0c 02 	sts	0x020C, r24	; 0x80020c <timer0_overflow_count>
 e08:	90 93 0d 02 	sts	0x020D, r25	; 0x80020d <timer0_overflow_count+0x1>
 e0c:	a0 93 0e 02 	sts	0x020E, r26	; 0x80020e <timer0_overflow_count+0x2>
 e10:	b0 93 0f 02 	sts	0x020F, r27	; 0x80020f <timer0_overflow_count+0x3>
}
 e14:	bf 91       	pop	r27
 e16:	af 91       	pop	r26
 e18:	9f 91       	pop	r25
 e1a:	8f 91       	pop	r24
 e1c:	7f 91       	pop	r23
 e1e:	6f 91       	pop	r22
 e20:	5f 91       	pop	r21
 e22:	4f 91       	pop	r20
 e24:	3f 91       	pop	r19
 e26:	2f 91       	pop	r18
 e28:	1f 91       	pop	r17
 e2a:	0f 91       	pop	r16
 e2c:	0f 90       	pop	r0
 e2e:	0f be       	out	0x3f, r0	; 63
 e30:	0f 90       	pop	r0
 e32:	1f 90       	pop	r1
 e34:	18 95       	reti

00000e36 <main>:
void setupUSB() __attribute__((weak));
void setupUSB() { }

int main(void)
{
	init();
 e36:	0e 94 31 01 	call	0x262	; 0x262 <init>

#if defined(USBCON)
	USBDevice.attach();
#endif
	
	setup();
 e3a:	0e 94 dc 03 	call	0x7b8	; 0x7b8 <setup>
    
	for (;;) {
		loop();
 e3e:	0e 94 67 05 	call	0xace	; 0xace <loop>
		if (serialEventRun) serialEventRun();
 e42:	0e 94 97 03 	call	0x72e	; 0x72e <serialEventRun()>
 e46:	fb cf       	rjmp	.-10     	; 0xe3e <main+0x8>

00000e48 <_GLOBAL__sub_I___vector_18>:
 e48:	6f ef       	ldi	r22, 0xFF	; 255
 e4a:	7f ef       	ldi	r23, 0xFF	; 255
 e4c:	81 e0       	ldi	r24, 0x01	; 1
 e4e:	90 e0       	ldi	r25, 0x00	; 0
 e50:	0e 94 29 02 	call	0x452	; 0x452 <__static_initialization_and_destruction_0(int, int)>
 e54:	08 95       	ret

00000e56 <__vector_19>:
#elif defined(USART_UDRE_vect)
ISR(USART_UDRE_vect)
#else
  #error "Don't know what the Data Register Empty vector is called for Serial"
#endif
{
 e56:	1f 92       	push	r1
 e58:	0f 92       	push	r0
 e5a:	0f b6       	in	r0, 0x3f	; 63
 e5c:	0f 92       	push	r0
 e5e:	11 24       	eor	r1, r1
 e60:	2f 93       	push	r18
 e62:	3f 93       	push	r19
 e64:	4f 93       	push	r20
 e66:	5f 93       	push	r21
 e68:	6f 93       	push	r22
 e6a:	7f 93       	push	r23
 e6c:	8f 93       	push	r24
 e6e:	9f 93       	push	r25
 e70:	af 93       	push	r26
 e72:	bf 93       	push	r27
 e74:	ef 93       	push	r30
 e76:	ff 93       	push	r31
  Serial._tx_udr_empty_irq();
 e78:	8a e6       	ldi	r24, 0x6A	; 106
 e7a:	91 e0       	ldi	r25, 0x01	; 1
 e7c:	0e 94 08 03 	call	0x610	; 0x610 <HardwareSerial::_tx_udr_empty_irq()>
}
 e80:	ff 91       	pop	r31
 e82:	ef 91       	pop	r30
 e84:	bf 91       	pop	r27
 e86:	af 91       	pop	r26
 e88:	9f 91       	pop	r25
 e8a:	8f 91       	pop	r24
 e8c:	7f 91       	pop	r23
 e8e:	6f 91       	pop	r22
 e90:	5f 91       	pop	r21
 e92:	4f 91       	pop	r20
 e94:	3f 91       	pop	r19
 e96:	2f 91       	pop	r18
 e98:	0f 90       	pop	r0
 e9a:	0f be       	out	0x3f, r0	; 63
 e9c:	0f 90       	pop	r0
 e9e:	1f 90       	pop	r1
 ea0:	18 95       	reti

00000ea2 <__vector_18>:
#elif defined(USART_RXC_vect)
  ISR(USART_RXC_vect) // ATmega8
#else
  #error "Don't know what the Data Received vector is called for Serial"
#endif
  {
 ea2:	1f 92       	push	r1
 ea4:	0f 92       	push	r0
 ea6:	0f b6       	in	r0, 0x3f	; 63
 ea8:	0f 92       	push	r0
 eaa:	11 24       	eor	r1, r1
 eac:	2f 93       	push	r18
 eae:	8f 93       	push	r24
 eb0:	9f 93       	push	r25
 eb2:	af 93       	push	r26
 eb4:	bf 93       	push	r27
 eb6:	ef 93       	push	r30
 eb8:	ff 93       	push	r31

// Actual interrupt handlers //////////////////////////////////////////////////////////////

void HardwareSerial::_rx_complete_irq(void)
{
  if (bit_is_clear(*_ucsra, UPE0)) {
 eba:	e0 91 7a 01 	lds	r30, 0x017A	; 0x80017a <Serial+0x10>
 ebe:	f0 91 7b 01 	lds	r31, 0x017B	; 0x80017b <Serial+0x11>
 ec2:	80 81       	ld	r24, Z
 ec4:	82 fd       	sbrc	r24, 2
 ec6:	14 c0       	rjmp	.+40     	; 0xef0 <__vector_18+0x4e>
    // No Parity error, read byte and store it in the buffer if there is
    // room
    unsigned char c = *_udr;
 ec8:	ea e6       	ldi	r30, 0x6A	; 106
 eca:	f1 e0       	ldi	r31, 0x01	; 1
 ecc:	a6 89       	ldd	r26, Z+22	; 0x16
 ece:	b7 89       	ldd	r27, Z+23	; 0x17
 ed0:	2c 91       	ld	r18, X
    rx_buffer_index_t i = (unsigned int)(_rx_buffer_head + 1) % SERIAL_RX_BUFFER_SIZE;
 ed2:	81 8d       	ldd	r24, Z+25	; 0x19
 ed4:	8f 5f       	subi	r24, 0xFF	; 255
 ed6:	8f 73       	andi	r24, 0x3F	; 63

    // if we should be storing the received character into the location
    // just before the tail (meaning that the head would advance to the
    // current location of the tail), we're about to overflow the buffer
    // and so we don't write the character or advance the head.
    if (i != _rx_buffer_tail) {
 ed8:	92 8d       	ldd	r25, Z+26	; 0x1a
 eda:	89 17       	cp	r24, r25
 edc:	71 f0       	breq	.+28     	; 0xefa <__vector_18+0x58>
      _rx_buffer[_rx_buffer_head] = c;
 ede:	df 01       	movw	r26, r30
 ee0:	e1 8d       	ldd	r30, Z+25	; 0x19
 ee2:	f0 e0       	ldi	r31, 0x00	; 0
 ee4:	e6 59       	subi	r30, 0x96	; 150
 ee6:	fe 4f       	sbci	r31, 0xFE	; 254
 ee8:	25 8f       	std	Z+29, r18	; 0x1d
      _rx_buffer_head = i;
 eea:	59 96       	adiw	r26, 0x19	; 25
 eec:	8c 93       	st	X, r24
 eee:	05 c0       	rjmp	.+10     	; 0xefa <__vector_18+0x58>
    }
  } else {
    // Parity error, read byte but discard it
    *_udr;
 ef0:	e0 91 80 01 	lds	r30, 0x0180	; 0x800180 <Serial+0x16>
 ef4:	f0 91 81 01 	lds	r31, 0x0181	; 0x800181 <Serial+0x17>
 ef8:	80 81       	ld	r24, Z
    Serial._rx_complete_irq();
  }
 efa:	ff 91       	pop	r31
 efc:	ef 91       	pop	r30
 efe:	bf 91       	pop	r27
 f00:	af 91       	pop	r26
 f02:	9f 91       	pop	r25
 f04:	8f 91       	pop	r24
 f06:	2f 91       	pop	r18
 f08:	0f 90       	pop	r0
 f0a:	0f be       	out	0x3f, r0	; 63
 f0c:	0f 90       	pop	r0
 f0e:	1f 90       	pop	r1
 f10:	18 95       	reti

00000f12 <__udivmodsi4>:
 f12:	a1 e2       	ldi	r26, 0x21	; 33
 f14:	1a 2e       	mov	r1, r26
 f16:	aa 1b       	sub	r26, r26
 f18:	bb 1b       	sub	r27, r27
 f1a:	fd 01       	movw	r30, r26
 f1c:	0d c0       	rjmp	.+26     	; 0xf38 <__udivmodsi4_ep>

00000f1e <__udivmodsi4_loop>:
 f1e:	aa 1f       	adc	r26, r26
 f20:	bb 1f       	adc	r27, r27
 f22:	ee 1f       	adc	r30, r30
 f24:	ff 1f       	adc	r31, r31
 f26:	a2 17       	cp	r26, r18
 f28:	b3 07       	cpc	r27, r19
 f2a:	e4 07       	cpc	r30, r20
 f2c:	f5 07       	cpc	r31, r21
 f2e:	20 f0       	brcs	.+8      	; 0xf38 <__udivmodsi4_ep>
 f30:	a2 1b       	sub	r26, r18
 f32:	b3 0b       	sbc	r27, r19
 f34:	e4 0b       	sbc	r30, r20
 f36:	f5 0b       	sbc	r31, r21

00000f38 <__udivmodsi4_ep>:
 f38:	66 1f       	adc	r22, r22
 f3a:	77 1f       	adc	r23, r23
 f3c:	88 1f       	adc	r24, r24
 f3e:	99 1f       	adc	r25, r25
 f40:	1a 94       	dec	r1
 f42:	69 f7       	brne	.-38     	; 0xf1e <__udivmodsi4_loop>
 f44:	60 95       	com	r22
 f46:	70 95       	com	r23
 f48:	80 95       	com	r24
 f4a:	90 95       	com	r25
 f4c:	9b 01       	movw	r18, r22
 f4e:	ac 01       	movw	r20, r24
 f50:	bd 01       	movw	r22, r26
 f52:	cf 01       	movw	r24, r30
 f54:	08 95       	ret

00000f56 <__tablejump2__>:
 f56:	ee 0f       	add	r30, r30
 f58:	ff 1f       	adc	r31, r31
 f5a:	05 90       	lpm	r0, Z+
 f5c:	f4 91       	lpm	r31, Z
 f5e:	e0 2d       	mov	r30, r0
 f60:	09 94       	ijmp

00000f62 <_exit>:
 f62:	f8 94       	cli

00000f64 <__stop_program>:
 f64:	ff cf       	rjmp	.-2      	; 0xf64 <__stop_program>