diff --git a/src/flashcart/ed64/ed64.c b/src/flashcart/ed64/ed64.c index b32543e10..14688bfd8 100644 --- a/src/flashcart/ed64/ed64.c +++ b/src/flashcart/ed64/ed64.c @@ -14,10 +14,18 @@ #include "ed64.h" #include "ed64_state.h" - +/** + * The ED64's variant, read from the CPLD + */ +// static ed64_device_variant_t device_variant = DEVICE_VARIANT_UNKNOWN; + +/** + * The ED64's current state + */ static ed64_pseudo_writeback_t current_state; extern int ed_exit (void); +static flashcart_err_t ed64_pesudo_set_save_writeback (void); static flashcart_err_t ed64_init (void) { @@ -29,58 +37,17 @@ static flashcart_err_t ed64_init (void) { // older everdrives cannot save during gameplay so we need to the reset method. // works by checking if a file exists. + // load the ed64 state file ed64_state_load(¤t_state); + // Cold restarts are only available with battery backup. + // FIXME: add hot restarts with: ` || RTC == true` + if (current_state.is_expecting_save_writeback == true) { - // make sure next boot doesnt trigger the check changing its state. - current_state.is_expecting_save_writeback = false; - ed64_state_save(¤t_state); - - // Now save the content back to the SD card! - FIL fil; - UINT bw; - uint8_t cartsave_data[KiB(128)]; - - // find the path to last save - if (file_exists(strip_sd_prefix(current_state.last_save_path))) { - - int save_size = file_get_size(current_state.last_save_path); - - if ((f_open(&fil, strip_sd_prefix(current_state.last_save_path), FA_CREATE_ALWAYS | FA_READ | FA_WRITE)) != FR_OK) { - return FLASHCART_ERR_LOAD; - } - - // everdrive doesn't care about the save type other than flash sram and eeprom - // so minus flashram we can just check the size - if (current_state.is_fram_save_type == true) { // flashram is bugged atm - ed64_ll_get_fram(cartsave_data, save_size); - // deletes flag - current_state.is_fram_save_type = false; - ed64_state_save(¤t_state); - } - else if (save_size > KiB(2)) { // sram - ed64_ll_get_sram(cartsave_data, save_size); - } - else { // eeprom - ed64_ll_get_eeprom(cartsave_data, save_size); - } - - if (f_write(&fil, cartsave_data, save_size, &bw) != FR_OK) { - return FLASHCART_ERR_LOAD; - } - - if (f_close(&fil) != FR_OK) { - return FLASHCART_ERR_LOAD; - } - } - else { - current_state.is_expecting_save_writeback = false; - current_state.is_fram_save_type = false; - current_state.last_save_path = ""; - ed64_state_save(¤t_state); - } + return ed64_pesudo_set_save_writeback(); } + return FLASHCART_OK; } @@ -116,7 +83,7 @@ static flashcart_err_t ed64_load_rom (char *rom_path, flashcart_progress_callbac // FIXME: if the cart is not V3 or X5 or X7, we need probably need to - 128KiB for save compatibility. // Or somehow warn that certain ROM's will have corruption due to the address space being used for saves. - // Conker's Bad Fur Day doesn't have this issue because eeprom data is at a fixed address in pif ram. + // EEPROM saves should be unaffected. if (rom_size > MiB(64)) { f_close(&fil); return FLASHCART_ERR_LOAD; @@ -124,7 +91,7 @@ static flashcart_err_t ed64_load_rom (char *rom_path, flashcart_progress_callbac // FIXME: is this actually needed? /* - if (rom_size == MiB(64)) { + if (rom_size <= MiB(64)) { ed64_save_type_t type = ed64_ll_get_save_type(); switch (type) { case SAVE_TYPE_SRAM: @@ -179,6 +146,7 @@ static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uin // FIXME: if the cart is not V3 or X5 or X7, we need probably need to - 128KiB for save compatibility. // Or somehow warn that certain ROM's will have corruption due to the address space being used for saves. + // EEPROM saves should be unaffected. if (file_size > (MiB(64) - rom_offset)) { f_close(&fil); @@ -206,7 +174,7 @@ static flashcart_err_t ed64_load_file (char *file_path, uint32_t rom_offset, uin return FLASHCART_OK; } -static flashcart_err_t ed64_load_save (char *save_path) { +static flashcart_err_t ed64_load_save (char *save_path) { // from file FIL fil; UINT br; @@ -216,42 +184,34 @@ static flashcart_err_t ed64_load_save (char *save_path) { return FLASHCART_ERR_LOAD; } - size_t save_size = file_get_size(save_path); - uint8_t cartsave_data[save_size]; + size_t save_file_size = file_get_size(strip_sd_prefix(save_path)); + uint8_t cartsave_data[save_file_size]; - if (f_read(&fil, cartsave_data, save_size, &br) != FR_OK) { + if (f_read(&fil, cartsave_data, save_file_size, &br) != FR_OK) { f_close(&fil); return FLASHCART_ERR_LOAD; } - if (br != save_size) { - return FLASHCART_ERR_LOAD; - } - - current_state.is_fram_save_type = false; - - ed64_save_type_t type = ed64_ll_get_save_type(); + ed64_save_type_t type = ed64_ll_get_save_type(); // current_state.is_save_type; switch (type) { case SAVE_TYPE_EEPROM_4K: case SAVE_TYPE_EEPROM_16K: - ed64_ll_set_eeprom(cartsave_data, save_size); + ed64_ll_set_eeprom(cartsave_data, type); break; case SAVE_TYPE_SRAM: case SAVE_TYPE_SRAM_128K: - ed64_ll_set_sram(cartsave_data, save_size); + ed64_ll_set_sram(cartsave_data, 0, save_file_size); break; case SAVE_TYPE_FLASHRAM: - ed64_ll_set_fram(cartsave_data, save_size); - // a cold and warm boot has no way of seeing save types and most types can be determined by size - // this tells the cart to use flash instead of sram 128 since they are the same size - current_state.is_fram_save_type = true; - ed64_state_save(¤t_state); + ed64_ll_set_fram(cartsave_data, save_file_size); + break; + case SAVE_TYPE_DD64_CART_PORT: break; default: break; } - + current_state.is_save_type = type; // SHOULD HAVE BEEN SET FROM ed64_set_save_type() current_state.last_save_path = save_path; current_state.is_expecting_save_writeback = true; ed64_state_save(¤t_state); @@ -289,6 +249,64 @@ static flashcart_err_t ed64_set_save_type (flashcart_save_type_t save_type) { ed64_ll_set_save_type(type); + current_state.is_save_type = type; + ed64_state_save(¤t_state); + + return FLASHCART_OK; +} + +static flashcart_err_t ed64_pesudo_set_save_writeback (void) { + // save the content back to the SD card! + FIL fil; + UINT bw; + uint8_t cartsave_data[KiB(128)]; + + // find the path to last save + if ( + file_exists(strip_sd_prefix(current_state.last_save_path)) + && current_state.is_save_type != SAVE_TYPE_NONE + && sys_reset_type() != RESET_COLD + ) { + + int save_size = file_get_size(current_state.last_save_path); + + if ((f_open(&fil, strip_sd_prefix(current_state.last_save_path), FA_CREATE_ALWAYS | FA_READ | FA_WRITE)) != FR_OK) { + return FLASHCART_ERR_LOAD; + } + + switch (current_state.is_save_type) { + case SAVE_TYPE_EEPROM_4K: + case SAVE_TYPE_EEPROM_16K: + ed64_ll_get_eeprom(cartsave_data, current_state.is_save_type); + break; + case SAVE_TYPE_SRAM: + case SAVE_TYPE_SRAM_128K: + ed64_ll_get_sram(cartsave_data, 0, save_size); + break; + case SAVE_TYPE_FLASHRAM: + ed64_ll_get_fram(cartsave_data, save_size); + break; + case SAVE_TYPE_DD64_CART_PORT: + break; + default: + break; + } + + if (f_write(&fil, cartsave_data, save_size, &bw) != FR_OK) { + return FLASHCART_ERR_LOAD; + } + + if (f_close(&fil) != FR_OK) { + return FLASHCART_ERR_LOAD; + } + } + + // make sure next boot doesn't trigger the check changing its state. + current_state.is_expecting_save_writeback = false; + current_state.is_save_type = SAVE_TYPE_NONE; + current_state.last_save_path = ""; + ed64_state_save(¤t_state); + return FLASHCART_OK; } diff --git a/src/flashcart/ed64/ed64_ll.c b/src/flashcart/ed64/ed64_ll.c index faea332db..3f095286d 100644 --- a/src/flashcart/ed64/ed64_ll.c +++ b/src/flashcart/ed64/ed64_ll.c @@ -2,56 +2,54 @@ #include #include "utils/utils.h" #include "ed64_ll.h" +#include "../flashcart_utils.h" -//FIXME find a better solution, perferably a libdragon one -void sleep (unsigned long ms); -void sleep (unsigned long ms) { +/* ED64 save location base address */ +#define ED64_SAVE_ADDR_BASE (0xA8000000) - unsigned long current_ms = get_ticks_ms(); +/* ED64 configuration registers base address */ +#define ED64_CONFIG_REGS_BASE (0xA8040000) - while (get_ticks_ms() - current_ms < ms); +/* ED64 configuration registers */ +typedef enum { + // REG_CFG = 0x00, + // REG_STATUS = 0x01, + // REG_DMA_LENGTH = 0x02, + // REG_DMA_RAM_ADDR = 0x03, + // REG_MSG = 0x04, + // REG_DMA_CFG = 0x05, + // REG_SPI = 0x06, + // REG_SPI_CFG = 0x07, + // REG_KEY = 0x08, + REG_SAV_CFG = 0x09, + // REG_SEC = 0x0A, /* Sectors?? */ + // REG_FPGA_VERSION = 0x0B, //11, /* Altera (Intel) MAX */ + // REG_GPIO = 0x0C, //12, -} +} ed64_ci_registers_id_t; -/* ED64 configuration registers base address */ -#define ED64_CONFIG_REGS_BASE (0xA8040000) + +/* ED64 Device Variant Mask */ +#define ED64_DEVICE_VARIANT_MASK (0xF000) + +void set_sram_pi_regs (void); typedef enum { - // REG_CFG = 0, - // REG_STATUS = 1, - // REG_DMA_LENGTH = 2, - // REG_DMA_RAM_ADDR = 3, - // REG_MSG = 4, - // REG_DMA_CFG = 5, - // REG_SPI = 6, - // REG_SPI_CFG = 7, - // REG_KEY = 8, - REG_SAV_CFG = 9, - // REG_SEC = 10, /* Sectors?? */ - // REG_FPGA_VERSION = 11, /* Altera (Intel) MAX */ - // REG_GPIO = 12, - -} ed64_registers_t; - -void pi_initialize (void); -void pi_dma_wait (void); -void pi_initialize_sram (void); -void pi_dma_from_sram (void *dest, unsigned long offset, unsigned long size); -void pi_dma_to_sram (void* src, unsigned long offset, unsigned long size); -void ed64_ll_set_sdcard_timing (void); - - -#define SAV_EEP_ON 1 -#define SAV_SRM_ON 2 -#define SAV_EEP_SIZE 4 -#define SAV_SRM_SIZE 8 - -#define SAV_RAM_BANK 128 -#define SAV_RAM_BANK_APPLY 32768 + SAV_EEP_ON_OFF = 0x01, + SAV_SRM_ON_OFF = 0x02, + SAV_EEP_SMALL_BIG = 0x04, + SAV_SRM_SMALL_BIG = 0x08, + SAV_RAM_BANK = 128, + SAV_RAM_BANK_APPLY = 32768 +} ed64_v_save_register_id_t; void ed64_ll_reg_write (uint32_t reg, uint32_t data); +uint8_t ed64_ll_sram_bank; +ed64_save_type_t ed64_ll_save_type; + + void ed64_ll_reg_write (uint32_t reg, uint32_t data) { *(volatile uint32_t *) (ED64_CONFIG_REGS_BASE); @@ -60,9 +58,6 @@ void ed64_ll_reg_write (uint32_t reg, uint32_t data) { } -uint8_t ed64_ll_sram_bank; -ed64_save_type_t ed64_ll_save_type; - ed64_save_type_t ed64_ll_get_save_type (void) { @@ -73,46 +68,46 @@ ed64_save_type_t ed64_ll_get_save_type (void) { void ed64_ll_set_save_type (ed64_save_type_t type) { uint16_t save_cfg; - uint8_t eeprom_on, sram_on, eeprom_size, sram_size, ram_bank; + uint8_t is_eeprom, is_sram, is_eeprom_16k, is_sram_128k, using_ram_bank; ed64_ll_save_type = type; - eeprom_on = 0; - sram_on = 0; - eeprom_size = 0; - sram_size = 0; - ram_bank = ed64_ll_sram_bank; + is_eeprom = false; + is_sram = false; + is_eeprom_16k = false; + is_sram_128k = false; + using_ram_bank = ed64_ll_sram_bank; switch (type) { case SAVE_TYPE_EEPROM_16K: - eeprom_on = 1; - eeprom_size = 1; + is_eeprom = true; + is_eeprom_16k = true; break; case SAVE_TYPE_EEPROM_4K: - eeprom_on = 1; + is_eeprom = true; break; case SAVE_TYPE_SRAM: - sram_on = 1; + is_sram = true; break; case SAVE_TYPE_SRAM_128K: - sram_on = 1; - sram_size = 1; + is_sram = true; + is_sram_128k = true; break; case SAVE_TYPE_FLASHRAM: - sram_on = 0; - sram_size = 1; + is_sram = false; + is_sram_128k = true; break; default: - sram_on = 0; - sram_size = 0; - ram_bank = 1; + is_sram = false; + is_sram_128k = false; + using_ram_bank = 1; break; } - if (eeprom_on)save_cfg |= SAV_EEP_ON; - if (sram_on)save_cfg |= SAV_SRM_ON; - if (eeprom_size)save_cfg |= SAV_EEP_SIZE; - if (sram_size)save_cfg |= SAV_SRM_SIZE; - if (ram_bank)save_cfg |= SAV_RAM_BANK; + if (is_eeprom)save_cfg |= SAV_EEP_ON_OFF; + if (is_sram)save_cfg |= SAV_SRM_ON_OFF; + if (is_eeprom_16k)save_cfg |= SAV_EEP_SMALL_BIG; + if (is_sram_128k)save_cfg |= SAV_SRM_SMALL_BIG; + if (using_ram_bank)save_cfg |= SAV_RAM_BANK; save_cfg |= SAV_RAM_BANK_APPLY; ed64_ll_reg_write(REG_SAV_CFG, save_cfg); @@ -125,49 +120,8 @@ void ed64_ll_set_sram_bank (uint8_t bank) { } -// FIXME Id like to use libdragon's equivelant for this -void _data_cache_invalidate_all (void) { - asm( - "li $8,0x80000000;" - "li $9,0x80000000;" - "addu $9,$9,0x1FF0;" - "cacheloop:;" - "cache 1,0($8);" - "cache 1,16($8);" - "cache 1,32($8);" - "cache 1,48($8);" - "cache 1,64($8);" - "cache 1,80($8);" - "cache 1,96($8);" - "addu $8,$8,112;" - "bne $8,$9,cacheloop;" - "cache 1,0($8);" - : // no outputs - : // no inputs - : "$8", "$9" // trashed registers - ); -} - - -// register related functions - -// FIXME i dont actually think the alt64 names are do what they are saying they are doing -// a proper rename is in order? - -void pi_initialize (void) { - - pi_dma_wait(); - io_write(PI_STATUS_REG, 0x03); - -} - -void pi_dma_wait (void) { - while (io_read(PI_STATUS_REG) & (PI_STATUS_IO_BUSY | PI_STATUS_DMA_BUSY)); - -} - -// Inits PI for sram transfer -void pi_initialize_sram (void) { +// Inits PI for sram transfers +void set_sram_pi_regs (void) { io_write(PI_BSD_DOM2_LAT_REG, 0x05); io_write(PI_BSD_DOM2_PWD_REG, 0x0C); @@ -176,74 +130,42 @@ void pi_initialize_sram (void) { } -void pi_dma_from_sram (void *dest, unsigned long offset, unsigned long size) { - - io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(dest)); - io_write(PI_CART_ADDR_REG, (PI_SAVE_ADDR + offset)); - asm volatile ("" : : : "memory"); - io_write(PI_WR_LEN_REG, (size - 1)); - asm volatile ("" : : : "memory"); - -} - -void pi_dma_to_sram (void *src, unsigned long offset, unsigned long size) { +void ed64_ll_get_sram (uint8_t *buffer, uint32_t address_offset, uint32_t size) { - pi_dma_wait(); + // TODO: potentially set the type so it can be used rather than an offset from the initial address. - io_write(PI_STATUS_REG, 2); - io_write(PI_DRAM_ADDR_REG, K1_TO_PHYS(src)); - io_write(PI_CART_ADDR_REG, (PI_SAVE_ADDR + offset)); - _data_cache_invalidate_all(); - io_write(PI_RD_LEN_REG, (size - 1)); + // collect current timings + uint32_t initalLatReg = io_read(PI_BSD_DOM2_LAT_REG); + uint32_t initalPwdReg = io_read(PI_BSD_DOM2_PWD_REG); + uint32_t initalPgsReg = io_read(PI_BSD_DOM2_PGS_REG); + uint32_t initalRlsReg = io_read(PI_BSD_DOM2_RLS_REG); -} + // set temporary timings for SRAM + set_sram_pi_regs(); -void ed64_ll_set_sdcard_timing (void) { + // read data + pi_dma_read_data((void*)(ED64_SAVE_ADDR_BASE + address_offset), buffer, size); - io_write(PI_BSD_DOM1_LAT_REG, 0x40); - io_write(PI_BSD_DOM1_PWD_REG, 0x12); - io_write(PI_BSD_DOM1_PGS_REG, 0x07); - io_write(PI_BSD_DOM1_RLS_REG, 0x03); - - io_write(PI_BSD_DOM2_LAT_REG, 0x40); - io_write(PI_BSD_DOM2_PWD_REG, 0x12); - io_write(PI_BSD_DOM2_PGS_REG, 0x07); - io_write(PI_BSD_DOM2_RLS_REG, 0x03); + // restore inital timings + io_write(PI_BSD_DOM2_LAT_REG, initalLatReg); + io_write(PI_BSD_DOM2_PWD_REG, initalPwdReg); + io_write(PI_BSD_DOM2_PGS_REG, initalPgsReg); + io_write(PI_BSD_DOM2_RLS_REG, initalRlsReg); } +void ed64_ll_get_eeprom (uint8_t *buffer, uint8_t eep_type) { -void ed64_ll_get_sram (uint8_t *buffer, int size) { - - pi_initialize_sram(); - - dma_wait(); - - pi_initialize(); - - sleep(250); - - // checks if the save isnt large and if so grabs it from the large save area - if(size == KiB(32)) - { - pi_dma_from_sram(buffer, 0, size) ; - } - else - { - pi_dma_from_sram(buffer, -KiB(64), size) ; - } - - dma_wait(); - - ed64_ll_set_sdcard_timing(); - -} + uint32_t size = eep_type == SAVE_TYPE_EEPROM_16K ? 4 : SAVE_TYPE_EEPROM_4K ? 1 : 0; -void ed64_ll_get_eeprom (uint8_t *buffer, int size) { + if (size != 0) { + ed64_ll_set_save_type(eep_type); + if (eeprom_present()) { // FIXME: does not correctly check type. - int blocks=size/8; - for( int b = 0; b < blocks; b++ ) { - eeprom_read( b, &buffer[b * 8] ); + for (uint32_t i = 0; i < size; i += 8) { + eeprom_read(i / 8, &buffer[i]); + } + } } } @@ -252,75 +174,69 @@ void ed64_ll_get_eeprom (uint8_t *buffer, int size) { void ed64_ll_get_fram (uint8_t *buffer, int size) { ed64_ll_set_save_type(SAVE_TYPE_SRAM_128K); //2 - sleep(512); - - data_cache_hit_writeback_invalidate(buffer,size); dma_wait(); - - ed64_ll_get_sram(buffer, size); - sleep(512); + ed64_ll_get_sram(buffer, 0, size); + data_cache_hit_writeback_invalidate(buffer, size); + + dma_wait(); ed64_ll_set_save_type(SAVE_TYPE_FLASHRAM); } -/* -sram upload -*/ +void ed64_ll_set_sram (uint8_t *buffer, uint32_t address_offset, int size) { -void ed64_ll_set_sram (uint8_t *buffer, int size) { + // collect current timings + uint32_t initalLatReg = io_read(PI_BSD_DOM2_LAT_REG); + uint32_t initalPwdReg = io_read(PI_BSD_DOM2_PWD_REG); + uint32_t initalPgsReg = io_read(PI_BSD_DOM2_PGS_REG); + uint32_t initalRlsReg = io_read(PI_BSD_DOM2_RLS_REG); - pi_dma_wait(); + // set temporary timings for SRAM + set_sram_pi_regs(); - //Timing - pi_initialize_sram(); + // write data + pi_dma_write_data(buffer, (void*)(ED64_SAVE_ADDR_BASE + address_offset), size); - //Readmode - pi_initialize(); + // restore inital timings + io_write(PI_BSD_DOM2_LAT_REG, initalLatReg); + io_write(PI_BSD_DOM2_PWD_REG, initalPwdReg); + io_write(PI_BSD_DOM2_PGS_REG, initalPgsReg); + io_write(PI_BSD_DOM2_RLS_REG, initalRlsReg); - data_cache_hit_writeback_invalidate(buffer,size); - dma_wait(); +} - // checks if you are no using a large save and if you are puts it in the large save area - if(size == KiB(32)) - { - pi_dma_to_sram(buffer, 0, size) ; - } - else - { - pi_dma_to_sram(buffer, -KiB(64), size) ; - } - //Wait - pi_dma_wait(); +uint8_t ed64_ll_set_eeprom(uint8_t *buffer, uint8_t eep_type) { - //Restore evd Timing - ed64_ll_set_sdcard_timing(); + uint8_t size = eep_type == SAVE_TYPE_EEPROM_16K ? 4 : SAVE_TYPE_EEPROM_4K ? 1 : 0; -} + if (size == 0) { // SAVE_TYPE_NONE + return 0; + } + ed64_ll_set_save_type(eep_type); -void ed64_ll_set_eeprom (uint8_t *buffer, int size) { + if (eeprom_present()) { // FIXME: does not correctly check type. - int blocks=size/8; - for( int b = 0; b < blocks; b++ ) { - eeprom_write( b, &buffer[b * 8] ); + for (uint32_t i = 0; i < size; i += 8) { + eeprom_write(i / 8, &buffer[i]); + } } + return 0; } void ed64_ll_set_fram (uint8_t *buffer, int size) { ed64_ll_set_save_type(SAVE_TYPE_SRAM_128K); - sleep(512); - - data_cache_hit_writeback_invalidate(buffer,size); dma_wait(); - ed64_ll_set_sram(buffer, size); + ed64_ll_set_sram(buffer, 0, size); + data_cache_hit_writeback_invalidate(buffer, size); - sleep(512); + dma_wait(); ed64_ll_set_save_type(SAVE_TYPE_FLASHRAM); } diff --git a/src/flashcart/ed64/ed64_ll.h b/src/flashcart/ed64/ed64_ll.h index 2ea4ab4b4..65f0edc13 100644 --- a/src/flashcart/ed64/ed64_ll.h +++ b/src/flashcart/ed64/ed64_ll.h @@ -12,13 +12,10 @@ #include #include -/* ED64 save location base address */ -#define PI_SAVE_ADDR 0xA8000000 - // FIXME: redefined because its in a .c instead of a .h #define PI_BASE_REG 0x04600000 - /////////////////////////////////////////////////////// + #define PI_STATUS_ERROR 0x04 #define PI_STATUS_IO_BUSY 0x02 #define PI_STATUS_DMA_BUSY 0x01 @@ -53,6 +50,16 @@ */ +typedef enum { + DEVICE_VARIANT_UNKNOWN = 0xFFFF, + DEVICE_VARIANT_V3_0 = 0x3000, + DEVICE_VARIANT_V2_5 = 0x2000, + DEVICE_VARIANT_V2_0 = 0x0000, + DEVICE_VARIANT_V1_0 = 0x0000, + DEVICE_VARIANT_P1_0 = 0x0000 +} ed64_device_variant_t; + + typedef enum { SAVE_TYPE_NONE = 0, SAVE_TYPE_SRAM = 1, @@ -67,18 +74,16 @@ typedef enum { #define ROM_ADDRESS (0xB0000000) /* Save functions */ -void pi_initialize_sram (void); -void _data_cache_invalidate_all (void); void ed64_ll_set_sram_bank (uint8_t bank); ed64_save_type_t ed64_ll_get_save_type (); void ed64_ll_set_save_type (ed64_save_type_t type); -void ed64_ll_get_sram (uint8_t *buffer, int size); -void ed64_ll_get_eeprom (uint8_t *buffer, int size); +void ed64_ll_get_sram (uint8_t *buffer, uint32_t address_offset, uint32_t size); +void ed64_ll_get_eeprom (uint8_t *buffer, uint8_t type); void ed64_ll_get_fram (uint8_t *buffer, int size); -void ed64_ll_set_sram (uint8_t *buffer, int size); -void ed64_ll_set_eeprom (uint8_t *buffer, int size); +void ed64_ll_set_sram (uint8_t *buffer, uint32_t address_offset, int size); +uint8_t ed64_ll_set_eeprom (uint8_t *buffer, uint8_t eep_type); void ed64_ll_set_fram (uint8_t *buffer, int size); /** @} */ /* ed64 */ diff --git a/src/flashcart/ed64/ed64_state.c b/src/flashcart/ed64/ed64_state.c index 3604e6573..03f630739 100644 --- a/src/flashcart/ed64/ed64_state.c +++ b/src/flashcart/ed64/ed64_state.c @@ -10,7 +10,7 @@ static ed64_pseudo_writeback_t init = { .is_expecting_save_writeback = false, - .is_fram_save_type = false, + .is_save_type = 0, .last_save_path = "" }; @@ -23,7 +23,7 @@ void ed64_state_load (ed64_pseudo_writeback_t *state) { mini_t *ini = mini_try_load(ED64_STATE_FILE_PATH); state->is_expecting_save_writeback = mini_get_bool(ini, "ed64", "is_expecting_save_writeback", init.is_expecting_save_writeback); - state->is_fram_save_type = mini_get_bool(ini, "ed64", "is_fram_save_type", init.is_fram_save_type); + state->is_save_type = mini_get_int(ini, "ed64", "is_save_type", init.is_save_type); state->last_save_path = strdup(mini_get_string(ini, "ed64", "last_save_path", init.last_save_path)); mini_free(ini); @@ -33,7 +33,7 @@ void ed64_state_save (ed64_pseudo_writeback_t *state) { mini_t *ini = mini_create(ED64_STATE_FILE_PATH); mini_set_bool(ini, "ed64", "is_expecting_save_writeback", state->is_expecting_save_writeback); - mini_set_bool(ini, "ed64", "is_fram_save_type", state->is_fram_save_type); + mini_set_int(ini, "ed64", "is_save_type", state->is_save_type); mini_set_string(ini, "ed64", "last_save_path", state->last_save_path); mini_save(ini, MINI_FLAGS_SKIP_EMPTY_GROUPS); diff --git a/src/flashcart/ed64/ed64_state.h b/src/flashcart/ed64/ed64_state.h index 3f53a1480..83f3dd262 100644 --- a/src/flashcart/ed64/ed64_state.h +++ b/src/flashcart/ed64/ed64_state.h @@ -12,7 +12,7 @@ typedef struct { /** @brief The reset button was used */ bool is_expecting_save_writeback; /** @brief The last save type was flash ram */ - bool is_fram_save_type; + int is_save_type; /** @brief The path to the last loaded ROM */ char *last_save_path; } ed64_pseudo_writeback_t;