PCI_SSD_System.h

/*********************************************************************************
* Copyright (c) 2010-2011, 
* Jim Stevens, Paul Tschirhart, Ishwar Singh Bhati, Mu-Tien Chang, Peter Enns, 
* Elliott Cooper-Balis, Paul Rosenfeld, Bruce Jacob
* University of Maryland
* Contact: jims [at] cs [dot] umd [dot] edu
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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*********************************************************************************/


#ifndef PCI_SSD_SYSTEM_H
#define PCI_SSD_SYSTEM_H

#include "Layer.h"
#include "common.h"
#include "config.h"

namespace PCISSD
{
	class PCI_SSD_System
	{
		public:
		PCI_SSD_System(uint id);
		~PCI_SSD_System();
		bool addTransaction(bool isWrite, uint64_t addr, int num_sectors);
		bool WillAcceptTransaction();
		void update();
		void RegisterCallbacks(TransactionCompleteCB *readDone, TransactionCompleteCB *writeDone);
		void printLogfile();

		// DMA functions
		void RegisterDMACallback(DMATransactionCB *add_dma, uint64_t mem_size);
		bool isDMATransaction(bool isWrite, uint64_t addr, bool done);
		void CompleteDMATransaction(bool isWrite, uint64_t addr);
		void AddDMAScatterGatherEntry(uint64_t addr, uint64_t length);

		// Internal functions
		void HybridSim_Read_Callback(uint id, uint64_t addr, uint64_t cycle);
		void HybridSim_Write_Callback(uint id, uint64_t addr, uint64_t cycle);


		void update_internal();
		void hybridsim_update_internal();

		void Process_Event_Queue();
		void Add_Event(TransactionEvent e);
		void Retry_Event(TransactionEvent e);

		void Layer1_Send_Event_Done(TransactionEvent e);
		void Layer1_Return_Event_Done(TransactionEvent e);

		void Layer2_Send_Event_Done(TransactionEvent e);
		void Layer2_Return_Event_Done(TransactionEvent e);

		void handle_hybridsim_add_transaction(Transaction t);
		void handle_hybridsim_callback(bool isWrite, uint64_t addr);

		void issue_external_callback(bool isWrite, uint64_t orig_addr);

		// Internal DMA functions
		void PerformDMA(Transaction t);
		void FinishDMA(Transaction t);
		void UpdateDMA();


		// Internal state
        TransactionCompleteCB *ReadDone;
        TransactionCompleteCB *WriteDone;
		uint systemID;

		uint64_t currentClockCycle;
		ClockDomain::ClockDomainCrosser *clockdomain;

		HybridSim::HybridSystem *hybridsim;
		ClockDomain::ClockDomainCrosser *hybridsim_clockdomain;

		// State to save while HybridSim is doing its thing.
		unordered_map<uint64_t, Transaction> hybridsim_transactions; // Outstanding sector transactions.
		unordered_map<uint64_t, set<uint64_t>> hybridsim_accesses; // Outstanding acceses to HybridSim for each sector.
		unordered_map<uint64_t, uint64_t> hybridsim_base_address; // Base address for an outstanding access.

		set<uint64_t> pending_sectors; // Simple rule: only one instance of each address at a time, otherwise, this is an error.

		list<TransactionEvent> event_queue;

		Layer *layer1;

		Layer *layer2;

		ofstream debug_file;


		// DMA state.

		// Callback to add a single DMA transaction to DRAMSim2.
		DMATransactionCB *add_dma;
		uint64_t dma_memory_size;

		unordered_map<uint64_t, Transaction> dma_transactions; // Outstanding DMA transactions.
		unordered_map<uint64_t, set<uint64_t>> dma_accesses; // Outstanding accesses to DRAMSim2 for each DMA transaction.
		unordered_map<uint64_t, uint64_t> dma_base_address; // Base addresses for each outstanding DRAMSim2 access.

		// DMA SG list (used to allow non-contiguous accesses to DRAMSim2).
		// First item in pair is address, second item is length.
		// This will be cleared with each call to addTransaction.
		list<uint64_t> dma_sg_base;
		list<uint64_t> dma_sg_len;
		unordered_set<uint64_t> dma_sg_all; // Used to check for duplicate transactions.

		list<pair<bool, uint64_t>> dma_queue;
		uint64_t dma_outstanding;
		

	};

	PCI_SSD_System *getInstance(uint id);

	uint64_t compute_interface_delay(uint64_t num_bytes, uint64_t bytes_per_second, uint64_t efficiency);
}

#endif