Add mainline u-boot support

[hansemro]

Mainline u-boot status/tasks:

• use new device model -> using FDT to configure drivers
• working SPL
• working serial
• working I2C: untested
• working SPI: omap3_dss
• working leds
• TWL6030 support + PWM
• SMB347 support
• TI BQ27541 support
• working MMC: requires ti-clkctrl hack
• clock control: There is a hack to get this working, but needs more testing
• working GPTimer PWM driver
• working LCD panel/backlight: LCD requires power-up sequence via SPI which only works with omap4_spi drivers currently
• working DSS Framebuffer
• working USB: controller not detected
• successful kernel boot
• fastboot/dfu support
• add OMAP USBBOOT command

[hansemro]

u-boot 2021.04 fork

u-boot 2021.04 + FDT/Device Model + linux 5.16.2

[ aboot second-stage loader ]
boot device: USB
jumping to 0x80e80000...
U-Boot 2021.04-00008-g30305380ab (Mar 15 2022 - 17:24:37 -0700)
CPU  : OMAP4430-GP ES2.3

Model: Amazon Kindle Fire (first generation)

kc1I2C:   ready

DRAM:  512 MiB

MMC:   OMAP SD/MMC: 5, OMAP SD/MMC: 4

In:    serial

Out:   serial

Err:   serial

Net:   Net Initialization Skipped

No ethernet found.

kc1 # version

U-Boot 2021.04-00008-g30305380ab (Mar 15 2022 - 17:24:37 -0700)
arm-none-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 10.2.1 20201103

GNU ld (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 2.35.1.20201028

kc1 # load mmc 5:c 0x82000000 /boot/bootmenu.scr

1022 bytes read in 4 ms (249 KiB/s)

kc1 # source 0x82000000

## Executing script at 82000000

kc1 # setenv boot_mmc_dev 5

kc1 # setenv loadaddr 0x82000000

kc1 # setenv bootargs console=tty1 console=ttyS2,115200 rw rootwait root=/dev/mmcblk0p12

kc1 # run linux_kernel_boot

8040402 bytes read in 196 ms (39.1 MiB/s)

kc1 # bootm ${loadaddr}

## Booting kernel from Legacy Image at 82000000 ...

Image Name:

Image Type:   ARM Linux Kernel Image (uncompressed)

Data Size:    8040338 Bytes = 7.7 MiB

Load Address: 80008000

Entry Point:  80008000

Verifying Checksum ... OK

Loading Kernel Image
Starting kernel ...
[    0.000000] Booting Linux on physical CPU 0x0

[    0.000000] Linux version 5.16.2-amazon-otter (clfs@x570) (arm-buildroot-linux-gnueabihf-gcc.br_real (Buildroot 2021.11-1329-g4edfb8fef8) 11.2.0, GNU ld (GNU Binutils) 2.35.2) #1 SMP Mon Mar 14 03:54:52 PDT 2022

[    0.000000] CPU: ARMv7 Processor [411fc093] revision 3 (ARMv7), cr=10c5387d

[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

[    0.000000] OF: fdt: Machine model: Amazon Kindle Fire (first generation)

[    0.000000] Memory policy: Data cache writealloc

[    0.000000] cma: Reserved 16 MiB at 0x9e800000

[    0.000000] OMAP4: Map 0x9fe00000 to (ptrval) for dram barrier

[    0.000000] Zone ranges:

[    0.000000]   Normal   [mem 0x0000000080000000-0x000000009fdfffff]

[    0.000000]   HighMem  empty

[    0.000000] Movable zone start for each node

[    0.000000] Early memory node ranges

[    0.000000]   node   0: [mem 0x0000000080000000-0x000000009fdfffff]

[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]

[    0.000000] OMAP4430 ES2.3

Build steps

wget https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu-a/10.2-2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
tar -xvf gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
export CROSS_COMPILE=$PWD/gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf/bin/arm-none-linux-gnueabihf-
export ARCH=arm
git clone https://github.com/hansemro/kf_u-boot
cd kf_u-boot
git checkout 2021.04_dev
make distclean && make kc1_config && make -j4

Loading u-boot via usbboot

For now, I recommend loading u-boot via OMAP usbboot with omapboot tool. See here for steps to enter usbboot mode.

cd ..
git clone https://github.com/al177/omap4boot.git
git clone https://github.com/kousu/omapboot.git
cd omap4boot
make TOOLCHAIN=$CROSS_COMPILE
cp out/panda/aboot.bin ~/
cd ../omapboot
pip3 install --user pyusb
## install omapboot to ~/.local/bin:
python setup.py develop --user
export PATH=$PATH:~/.local/bin
cd ../kf_u-boot
## reboot kindle fire to usbboot mode, then run the command below
omapboot -a ~/aboot.bin u-boot.bin

[hansemro]

CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_OMAP=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_TI=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y

u-boot usb start log

kc1 # usb start
starting USB...
Bus ehci@c00: clk_set_defaults(target-module@64000)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e198
ofnode_read_prop: assigned-clock-rates: 
clk_set_defaults(usbhshost@0)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e200
ofnode_read_prop: assigned-clock-rates: 
ofnode_read_prop: port1-mode: 
ofnode_read_prop: port2-mode: 
ofnode_read_prop: port3-mode: 
Initializing OMAP EHCI
OMAP UHH_REVISION 0x50700100
OMAP EHCI init done
clk_set_defaults(ehci@c00)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e298
ofnode_read_prop: assigned-clock-rates: 
OF: ** translation for device ehci@c00 **
OF: bus is default (na=1, ns=1) on usbhshost@0
OF: parent bus is default (na=1, ns=1) on target-module@64000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=c00
OF: with offset: 3072
OF: parent bus is default (na=1, ns=1) on segment@0
OF: walking ranges...
OF: default map, cp=0, s=1000, da=c00
OF: with offset: 3072
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=0, s=800, da=64c00
OF: default map, cp=1000, s=1000, da=64c00
OF: default map, cp=800, s=800, da=64c00
OF: default map, cp=2000, s=1000, da=64c00
OF: default map, cp=3000, s=1000, da=64c00
OF: default map, cp=4000, s=1000, da=64c00
OF: default map, cp=5000, s=1000, da=64c00
OF: default map, cp=56000, s=1000, da=64c00
OF: default map, cp=57000, s=1000, da=64c00
OF: default map, cp=5c000, s=1000, da=64c00
OF: default map, cp=58000, s=4000, da=64c00
OF: default map, cp=62000, s=1000, da=64c00
OF: default map, cp=63000, s=1000, da=64c00
OF: default map, cp=8000, s=2000, da=64c00
OF: default map, cp=a000, s=1000, da=64c00
OF: default map, cp=66000, s=1000, da=64c00
OF: default map, cp=67000, s=1000, da=64c00
OF: default map, cp=5e000, s=2000, da=64c00
OF: default map, cp=60000, s=1000, da=64c00
OF: default map, cp=64000, s=1000, da=64c00
OF: with offset: 3072
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=64c00
OF: with offset: 412672
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1241926656
OF: reached root node
ehci_register: dev='ehci@c00', ctrl=9df61200, hccr=4a064c00, hcor=4a064c10, init=0
Register 1313 NbrPorts 3
USB EHCI 1.00
Bus usb_otg_hs@0: OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
fdtdec_get_int: multipoint: 0x1 (1)
fdtdec_get_int: num-eps: 0x10 (16)
fdtdec_get_int: ram-bits: 0xc (12)
fdtdec_get_int: power: 0x32 (50)
fdtdec_get_int: interface-type: 0x1 (1)
clk_set_defaults(segment@80000)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e368
ofnode_read_prop: assigned-clock-rates: 
clk_set_defaults(target-module@2b000)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e3d0
ofnode_read_prop: assigned-clock-rates: 
clk_get_by_name(dev=9df5e3d0, name=fck, clk=9df613d0)
fdtdec_get_int: #clock-cells: 0x2 (2)
Looking for clk@20
Looking for clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
   - result for clk@20: clk@20 (ret=0)
   - result for clk@20: clk@20 (ret=0)
ti_ctrl_clk clk@20: name=clk@20, id=64
clk_request(dev=9df5dde8, clk=9df613d0)
clk_get_by_name(dev=9df5e3d0, name=ick, clk=9df613f0)
fdt_stringlist_search() failed: -61
clk_enable(clk=9df613d0)
ti_ctrl_clk clk@20: enable module @ 4a009360
Enable clock module - 4a009360
clk_enable(clk=9df613f0)
clk_set_defaults(usb_otg_hs@0)
clk_set_default_parents: could not read assigned-clock-parents for 9df5e438
ofnode_read_prop: assigned-clock-rates: 
OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
musb-hdrc: hw_ep 0shared, max 64
musb-hdrc: hw_ep 1tx, max 512
musb-hdrc: hw_ep 1rx, max 512
musb-hdrc: hw_ep 2tx, max 512
musb-hdrc: hw_ep 2rx, max 512
musb-hdrc: hw_ep 3tx, max 512
musb-hdrc: hw_ep 3rx, max 512
musb-hdrc: hw_ep 4tx, max 512
musb-hdrc: hw_ep 4rx, max 512
musb-hdrc: hw_ep 5tx, max 512
musb-hdrc: hw_ep 5rx, max 512
musb-hdrc: hw_ep 6tx, max 512
musb-hdrc: hw_ep 6rx, max 512
musb-hdrc: hw_ep 7tx, max 512
musb-hdrc: hw_ep 7rx, max 512
musb-hdrc: hw_ep 8tx, max 512
musb-hdrc: hw_ep 8rx, max 512
musb-hdrc: hw_ep 9tx, max 512
musb-hdrc: hw_ep 9rx, max 512
musb-hdrc: hw_ep 10tx, max 256
musb-hdrc: hw_ep 10rx, max 64
musb-hdrc: hw_ep 11tx, max 256
musb-hdrc: hw_ep 11rx, max 64
musb-hdrc: hw_ep 12tx, max 256
musb-hdrc: hw_ep 12rx, max 64
musb-hdrc: hw_ep 13shared, max 4096
musb-hdrc: hw_ep 14shared, max 1024
musb-hdrc: hw_ep 15shared, max 1024
<== devctl 98
HDRC disabled
Port not available.
scanning bus ehci@c00 for devices... 
Calling usb_setup_device(), portnr=0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x40
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=256, index=0
USB_DT_DEVICE request
set address 1
usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=5 (0x5), type=0 (0x0), value=1, index=0
USB_REQ_SET_ADDRESS
Len is 0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 0x12
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=256, index=0
USB_DT_DEVICE request
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x9
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=512, index=0
USB_DT_CONFIG config
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 0x19
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=512, index=0
USB_DT_CONFIG config
get_conf_no 0 Result 25, wLength 25
if 0, ep 0
##EP epmaxpacketin[1] = 8
set configuration 1
usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=9 (0x9), type=0 (0x0), value=1, index=0
USB_REQ_SET_CONFIGURATION
Len is 0
new device strings: Mfr=1, Product=2, SerialNumber=0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 0xFF
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=768, index=0
USB_DT_STRING config
USB device number 1 default language ID 0x1
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x1 length 0xFF
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=769, index=1
USB_DT_STRING config
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x1 length 0xFF
ehci_submit_control_msg: dev='ehci@c00', udev=9df3e0c0, udev->dev='ehci@c00', portnr=0
req=6 (0x6), type=128 (0x80), value=770, index=1
USB_DT_STRING config
Manufacturer u-boot
Product      EHCI Host Controller
SerialNumber 
read_descriptor for 'ehci@c00': ret=0
** usb_find_child returns -2
usb_find_and_bind_driver: Searching for driver
ofnode_read_u32_index: usb,device-class: (not found)
ofnode_read_u32_index: usb,interface-class: (not found)
usb_find_and_bind_driver: Match found: usb_hub
usb_scan_device: Probing 'usb_hub', plat=9df61490
clk_set_defaults(ehci@c00)
clk_set_default_parents: could not read assigned-clock-parents for 9df61438
ofnode_read_prop: assigned-clock-rates: 
usb_hub_post_probe
usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=6 (0x6), type=160 (0xa0), value=10496, index=0
USB_DT_HUB config
usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 0x8
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=6 (0x6), type=160 (0xa0), value=10496, index=0
USB_DT_HUB config
3 ports detected
individual port power switching
standalone hub
global over-current protection
Single TT
TT requires at most 8 FS bit times (666 ns)
power on to power good time: 20ms
hub controller current requirement: 0mA
port 1 is removable
port 2 is removable
port 3 is removable
usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=160 (0xa0), value=0, index=0
get_hub_status returned status 1, change 103
local power source is lost (inactive)
no over-current condition exists
enabling power on all ports
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=3 (0x3), type=35 (0x23), value=8, index=1
Len is 0
port 1 returns 0
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x2 length 0x0
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=3 (0x3), type=35 (0x23), value=8, index=2
Len is 0
port 2 returns 0
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x3 length 0x0
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=3 (0x3), type=35 (0x23), value=8, index=3
Len is 0
port 3 returns 0
pgood_delay=20ms
devnum=1 poweron: query_delay=100 connect_timeout=1100
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=1
Port 1 Status 500 Change 0
devnum=1 port=1: timeout
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=2
Port 2 Status 500 Change 0
devnum=1 port=2: timeout
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x3 length 0x4
ehci_submit_control_msg: dev='ehci@c00', udev=9df61500, udev->dev='usb_hub', portnr=0
req=0 (0x0), type=163 (0xa3), value=0, index=3
Port 3 Status 500 Change 0
devnum=1 port=3: timeout
1 USB Device(s) found
scan end
       scanning usb for storage devices... 0 Storage Device(s) found

[hansemro]

CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_TI=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y

u-boot usb start log

kc1 # usb start
starting USB...
Bus usb_otg_hs@0: OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
fdtdec_get_int: multipoint: 0x1 (1)
fdtdec_get_int: num-eps: 0x10 (16)
fdtdec_get_int: ram-bits: 0xc (12)
fdtdec_get_int: power: 0x32 (50)
fdtdec_get_int: interface-type: 0x1 (1)
clk_set_defaults(segment@80000)
clk_set_default_parents: could not read assigned-clock-parents for 9df61268
ofnode_read_prop: assigned-clock-rates: 
clk_set_defaults(target-module@2b000)
clk_set_default_parents: could not read assigned-clock-parents for 9df612d0
ofnode_read_prop: assigned-clock-rates: 
clk_get_by_name(dev=9df612d0, name=fck, clk=9df64110)
fdtdec_get_int: #clock-cells: 0x2 (2)
Looking for clk@20
Looking for clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
   - result for clk@20: clk@20 (ret=0)
   - result for clk@20: clk@20 (ret=0)
ti_ctrl_clk clk@20: name=clk@20, id=64
clk_request(dev=9df60de8, clk=9df64110)
clk_get_by_name(dev=9df612d0, name=ick, clk=9df64130)
fdt_stringlist_search() failed: -61
clk_enable(clk=9df64110)
ti_ctrl_clk clk@20: enable module @ 4a009360
Enable clock module - 4a009360
clk_enable(clk=9df64130)
clk_set_defaults(usb_otg_hs@0)
clk_set_default_parents: could not read assigned-clock-parents for 9df61368
ofnode_read_prop: assigned-clock-rates: 
OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
musb-hdrc: hw_ep 0shared, max 64
musb-hdrc: hw_ep 1tx, max 512
musb-hdrc: hw_ep 1rx, max 512
musb-hdrc: hw_ep 2tx, max 512
musb-hdrc: hw_ep 2rx, max 512
musb-hdrc: hw_ep 3tx, max 512
musb-hdrc: hw_ep 3rx, max 512
musb-hdrc: hw_ep 4tx, max 512
musb-hdrc: hw_ep 4rx, max 512
musb-hdrc: hw_ep 5tx, max 512
musb-hdrc: hw_ep 5rx, max 512
musb-hdrc: hw_ep 6tx, max 512
musb-hdrc: hw_ep 6rx, max 512
musb-hdrc: hw_ep 7tx, max 512
musb-hdrc: hw_ep 7rx, max 512
musb-hdrc: hw_ep 8tx, max 512
musb-hdrc: hw_ep 8rx, max 512
musb-hdrc: hw_ep 9tx, max 512
musb-hdrc: hw_ep 9rx, max 512
musb-hdrc: hw_ep 10tx, max 256
musb-hdrc: hw_ep 10rx, max 64
musb-hdrc: hw_ep 11tx, max 256
musb-hdrc: hw_ep 11rx, max 64
musb-hdrc: hw_ep 12tx, max 256
musb-hdrc: hw_ep 12rx, max 64
musb-hdrc: hw_ep 13shared, max 4096
musb-hdrc: hw_ep 14shared, max 1024
musb-hdrc: hw_ep 15shared, max 1024
<== devctl 98
HDRC disabled
Port not available.
scan end

[hansemro]

CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_OMAP3=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_TI=y
CONFIG_USB_MUSB_OMAP2PLUS=y
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_TWL4030_USB=y
CONFIG_OMAP_USB_PHY=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y

u-boot usb start log with extra printfs

kc1 # usb start
starting USB...
Bus usb_otg_hs@0: OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
fdtdec_get_int: multipoint: 0x1 (1)
fdtdec_get_int: num-eps: 0x10 (16)
fdtdec_get_int: ram-bits: 0xc (12)
fdtdec_get_int: power: 0x32 (50)
fdtdec_get_int: interface-type: 0x1 (1)
clk_set_defaults(segment@80000)
clk_set_default_parents: could not read assigned-clock-parents for 9df62268
ofnode_read_prop: assigned-clock-rates: 
clk_set_defaults(target-module@2b000)
clk_set_default_parents: could not read assigned-clock-parents for 9df622d0
ofnode_read_prop: assigned-clock-rates: 
clk_get_by_name(dev=9df622d0, name=fck, clk=9df65110)
fdtdec_get_int: #clock-cells: 0x2 (2)
Looking for clk@20
Looking for clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
      - checking clk@20
   - result for clk@20: clk@20 (ret=0)
   - result for clk@20: clk@20 (ret=0)
ti_ctrl_clk clk@20: name=clk@20, id=64
clk_request(dev=9df61de8, clk=9df65110)
clk_get_by_name(dev=9df622d0, name=ick, clk=9df65130)
fdt_stringlist_search() failed: -61
clk_enable(clk=9df65110)
ti_ctrl_clk clk@20: enable module @ 4a009360
Enable clock module - 4a009360
clk_enable(clk=9df65130)
clk_set_defaults(usb_otg_hs@0)
clk_set_default_parents: could not read assigned-clock-parents for 9df62368
ofnode_read_prop: assigned-clock-rates: 
OF: ** translation for device usb_otg_hs@0 **
OF: bus is default (na=1, ns=1) on target-module@2b000
OF: parent bus is default (na=1, ns=1) on segment@80000
OF: walking ranges...
OF: default map, cp=0, s=1000, da=0
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on interconnect@4a000000
OF: walking ranges...
OF: default map, cp=59000, s=1000, da=2b000
OF: default map, cp=5a000, s=1000, da=2b000
OF: default map, cp=5b000, s=1000, da=2b000
OF: default map, cp=5c000, s=1000, da=2b000
OF: default map, cp=5d000, s=1000, da=2b000
OF: default map, cp=5e000, s=1000, da=2b000
OF: default map, cp=60000, s=1000, da=2b000
OF: default map, cp=61000, s=1000, da=2b000
OF: default map, cp=74000, s=1000, da=2b000
OF: default map, cp=75000, s=1000, da=2b000
OF: default map, cp=76000, s=1000, da=2b000
OF: default map, cp=77000, s=1000, da=2b000
OF: default map, cp=36000, s=1000, da=2b000
OF: default map, cp=37000, s=1000, da=2b000
OF: default map, cp=4d000, s=1000, da=2b000
OF: default map, cp=4e000, s=1000, da=2b000
OF: default map, cp=29000, s=1000, da=2b000
OF: default map, cp=2a000, s=1000, da=2b000
OF: default map, cp=2b000, s=1000, da=2b000
OF: with offset: 0
OF: parent bus is default (na=1, ns=1) on ocp
OF: walking ranges...
OF: default map, cp=0, s=80000, da=ab000
OF: default map, cp=80000, s=80000, da=ab000
OF: with offset: 176128
OF: parent bus is default (na=1, ns=1) on 
OF: no ranges, 1:1 translation
OF: with offset: 1242214400
OF: reached root node
musb_init_controller: ===========
musb_init_controller: allocated instance: 9df651d0
musb_init_controller: musb_platform_init
omap2430_musb_init: ============
omap2430_musb_init: Reset finished
omap2430_musb_init: init finished
musb_init_controller: musb_platform_init: 0
musb-hdrc: hw_ep 0shared, max 64
musb-hdrc: hw_ep 1tx, max 512
musb-hdrc: hw_ep 1rx, max 512
musb-hdrc: hw_ep 2tx, max 512
musb-hdrc: hw_ep 2rx, max 512
musb-hdrc: hw_ep 3tx, max 512
musb-hdrc: hw_ep 3rx, max 512
musb-hdrc: hw_ep 4tx, max 512
musb-hdrc: hw_ep 4rx, max 512
musb-hdrc: hw_ep 5tx, max 512
musb-hdrc: hw_ep 5rx, max 512
musb-hdrc: hw_ep 6tx, max 512
musb-hdrc: hw_ep 6rx, max 512
musb-hdrc: hw_ep 7tx, max 512
musb-hdrc: hw_ep 7rx, max 512
musb-hdrc: hw_ep 8tx, max 512
musb-hdrc: hw_ep 8rx, max 512
musb-hdrc: hw_ep 9tx, max 512
musb-hdrc: hw_ep 9rx, max 512
musb-hdrc: hw_ep 10tx, max 256
musb-hdrc: hw_ep 10rx, max 64
musb-hdrc: hw_ep 11tx, max 256
musb-hdrc: hw_ep 11rx, max 64
musb-hdrc: hw_ep 12tx, max 256
musb-hdrc: hw_ep 12rx, max 64
musb-hdrc: hw_ep 13shared, max 4096
musb-hdrc: hw_ep 14shared, max 1024
musb-hdrc: hw_ep 15shared, max 1024
musb_init_controller: musb_core_init: 0
musb_start: ===========
<== devctl 98
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
i2c_write: error waiting for addr ACK (status=0x116)
Error:TWL4030:USB Timeout setting PHY DPLL clock
ERROR: omap2430_musb_enable Could not initialize PHY
HDRC disabled
omap2430_low_level_exit: ============
Port not available.
scan end

[hansemro]

OMAP usbboot support added:

kc1 # version
U-Boot 2021.04-00009-gb61bd5b9dc-dirty (Mar 16 2022 - 00:40:12 -0700)

arm-none-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 10.2.1 20201103
GNU ld (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16)) 2.35.1.20201028
kc1 # kc1_usbboot
[ aboot second-stage loader ]

boot device: USB

jumping to 0x80e80000...
initcall: 80ec13d5


U-Boot 2021.04-00009-gb61bd5b9dc-dirty (Mar 16 2022 - 00:40:12 -0700)

initcall: 80e8d749
U-Boot code: 80E80000 -> 80EE607C  BSS: -> 80EF01BC
initcall: 80e8d61d
initcall: 80e82835
CPU  : OMAP4430-GP ES2.3
initcall: 80e8de0d
Model: Amazon Kindle Fire (first generation)
kc1initcall: 80e8d86d
I2C:   omap24_i2c_findpsc: speed [kHz]: 400 psc: 0x9 sscl: 0x9 ssch: 0x3
ready
initcall: 80e8d85d
DRAM:  initcall: 80e8280d
>>sdram_init()
initcall: 80e8da7d
Monitor len: 000701BC