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\documentclass[technote]{IEEEtran}
\usepackage{cite}
\usepackage{lipsum}
\usepackage{todonotes}
\usepackage[utf8]{inputenc}
\usepackage{hyperref}
\usepackage{graphicx}
%\usepackage[justification=centering]{caption}
\setlength{\marginparwidth}{1.3cm}
\begin{document}
\title{A Hybrid Approach to Prefetching Based on a Global History Buffer\\ TDT4260 - Computer Architecture}
\author{
\IEEEauthorblockN{
Øyvind Robertsen,
Jonatan Lund,
Truls Rustad Fossum and
Katrine Roland
}
\IEEEauthorblockA{
Department of Computer and Information Science\\
Faculty of Information Technology, Mathematics and Electrical Engineering\\
Norwegian University of Science and Technology\\
NTNU, 7491 Trondheim\\
Norway
}
}
\maketitle
\begin{abstract}
Processor performance increases at a higher rate than memory
performance. New techniques are developed to minimize the decreased
performance resulting from the CPU spending time idle while waiting
for data. Cache hierarchies place frequently used data closer to the
processor. In order to more often have the the right data in cache
at the right time, data is fetched from a lower level in the
hierarchy before the processor requests it. Predicting what to fetch
when, is a hard problem and can be approached in many ways. In this
paper we evaluate several prefetching techniques by simulating them
in software and running a set of benchmark applications. We
hypothesize that a hybrid of several techniques will lead to
increased performance. We find that the fastest non-hybrid
prefetcher achieves an average speedup in program execution time of
$1.09$. Our hybrid approach achieves only $1.08$.
\end{abstract}
\input{introduction}
\input{background}
\input{prefetcher}
\input{methodology}
\input{results-and-discussion}
\input{related-work}
\input{conclusion}
\bibliographystyle{plain}
\bibliography{bibliography}
\end{document}