diff --git a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
index fdd44072735d..f8031edd9f05 100644
--- a/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
+++ b/mlir/include/mlir/Dialect/DXSA/IR/DXSAOps.td
@@ -51,6 +51,25 @@ def DXSA_GlobalFlagsAttr :
   let assemblyFormat = "`<` $value `>`";
 }
 
+def DXSA_TessellatorDomain_Isoline : I32EnumAttrCase<"domain_isoline", 1>;
+def DXSA_TessellatorDomain_Tri     : I32EnumAttrCase<"domain_tri",     2>;
+def DXSA_TessellatorDomain_Quad    : I32EnumAttrCase<"domain_quad",    3>;
+
+def DXSA_TessellatorDomain : I32EnumAttr<
+    "TessellatorDomain", "tessellator domain", [
+      DXSA_TessellatorDomain_Isoline,
+      DXSA_TessellatorDomain_Tri,
+      DXSA_TessellatorDomain_Quad
+    ]> {
+  let cppNamespace = "::mlir::dxsa";
+  let genSpecializedAttr = 0;
+}
+
+def DXSA_TessellatorDomainAttr :
+    EnumAttr<DXSADialect, DXSA_TessellatorDomain, "tessellator_domain"> {
+  let assemblyFormat = "$value";
+}
+
 def DXSA_TessellatorOutputPrimitiveType_OutputPoint       : I32EnumAttrCase<"output_point",        1>;
 def DXSA_TessellatorOutputPrimitiveType_OutputLine        : I32EnumAttrCase<"output_line",         2>;
 def DXSA_TessellatorOutputPrimitiveType_OutputTriangleCw  : I32EnumAttrCase<"output_triangle_cw",  3>;
@@ -238,6 +257,23 @@ def DXSA_DclOutputControlPointCount :
   let assemblyFormat = [{ $count attr-dict }];
 }
 
+def DXSA_DclTessellatorDomain : DXSA_Op<"dcl_tessellator_domain"> {
+  let summary = "declares the tessellator domain";
+  let description = [{
+    The `dxsa.dcl_tessellator_domain` operation declares the tessellator
+    domain.
+
+    Example:
+
+    ```mlir
+    dxsa.dcl_tessellator_domain domain_quad
+    ```
+  }];
+
+  let arguments = (ins DXSA_TessellatorDomainAttr:$domain);
+  let assemblyFormat = "$domain attr-dict";
+}
+
 def DXSA_DclTessellatorOutputPrimitive
     : DXSA_Op<"dcl_tessellator_output_primitive"> {
   let summary = "declares the tessellator output primitive type";
diff --git a/mlir/lib/Target/DXSA/BinaryParser.cpp b/mlir/lib/Target/DXSA/BinaryParser.cpp
index f5a2dbf3623f..5b0a0305dd3d 100644
--- a/mlir/lib/Target/DXSA/BinaryParser.cpp
+++ b/mlir/lib/Target/DXSA/BinaryParser.cpp
@@ -529,6 +529,13 @@ class DXBuilder {
         builder, loc, builder.getI32IntegerAttr(count));
   }
 
+  Instruction buildDclTessellatorDomain(dxsa::TessellatorDomain domain,
+                                        Location loc) {
+    auto domainAttr =
+        dxsa::TessellatorDomainAttr::get(builder.getContext(), domain);
+    return dxsa::DclTessellatorDomain::create(builder, loc, domainAttr);
+  }
+
   Instruction buildDclTessellatorOutputPrimitive(
       dxsa::TessellatorOutputPrimitiveType outputPrimitiveType, Location loc) {
     auto outputPrimitiveTypeAttr =
@@ -908,6 +915,15 @@ class Parser {
     return builder.buildDclOutputControlPointCount(count, loc);
   }
 
+  FailureOr<Instruction> parseDclTessellatorDomain(uint32_t opcodeToken,
+                                                   Location loc) {
+    auto rawDomain = DECODE_D3D11_SB_TESS_DOMAIN(opcodeToken);
+    auto domain = dxsa::symbolizeTessellatorDomain(rawDomain);
+    if (!domain)
+      return emitError(loc, "unknown tessellator domain: ") << rawDomain;
+    return builder.buildDclTessellatorDomain(*domain, loc);
+  }
+
   FailureOr<Instruction>
   parseDclTessellatorOutputPrimitive(uint32_t opcodeToken, Location loc) {
     auto rawOutputPrimitiveType =
@@ -949,6 +965,9 @@ class Parser {
     case D3D11_SB_OPCODE_DCL_OUTPUT_CONTROL_POINT_COUNT:
       result = parseDclOutputControlPointCount(opcodeToken, loc);
       break;
+    case D3D11_SB_OPCODE_DCL_TESS_DOMAIN:
+      result = parseDclTessellatorDomain(opcodeToken, loc);
+      break;
     case D3D11_SB_OPCODE_DCL_TESS_OUTPUT_PRIMITIVE:
       result = parseDclTessellatorOutputPrimitive(opcodeToken, loc);
       break;
diff --git a/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir b/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir
new file mode 100644
index 000000000000..6007a9f8cc72
--- /dev/null
+++ b/mlir/test/Target/DXSA/dcl_tessellator_domain.mlir
@@ -0,0 +1,7 @@
+// RUN: mlir-translate --import-dxsa-bin %S/inputs/dcl_tessellator_domain.bin | FileCheck %s
+
+// CHECK:      module {
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_isoline
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_tri
+// CHECK-NEXT:   dxsa.dcl_tessellator_domain domain_quad
+// CHECK-NEXT: }
diff --git a/mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin b/mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin
new file mode 100644
index 000000000000..cf69df11dd8f
Binary files /dev/null and b/mlir/test/Target/DXSA/inputs/dcl_tessellator_domain.bin differ