[FlyDSL][MOE] Enable a8w8 blockscale moe splitk in flydsl #3280
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lalala-sh wants to merge 1 commit into
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[FlyDSL][MOE] Enable a8w8 blockscale moe splitk in flydsl #3280lalala-sh wants to merge 1 commit into
lalala-sh wants to merge 1 commit into
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Extended tests (opt-in via labels):
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| if out_dtype not in ("f16", "bf16"): | ||
| raise ValueError(f"out_dtype must be 'f16' or 'bf16', got {out_dtype!r}") | ||
| # NOTE: don't materialize MLIR types outside an active MLIR Context. | ||
| out_mlir = lambda: (lambda ty: ty() if callable(ty) else ty)(T.f16 if out_dtype == "f16" else T.bf16) |
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Do not assign a lambda expression, use a def
Suggested change
| out_mlir = lambda: (lambda ty: ty() if callable(ty) else ty)(T.f16 if out_dtype == "f16" else T.bf16) | |
| def out_mlir(): | |
| return (lambda ty: ty() if callable(ty) else ty)(T.f16 if out_dtype == "f16" else T.bf16) |
| elem_type_tag = "bf16" | ||
| else: | ||
| raise ValueError(f"Unsupported dtype: {dtype_str}") | ||
| compute_type = lambda: T.f32 |
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| else: | ||
| raise ValueError(f"Unsupported dtype: {dtype_str}") | ||
| compute_type = lambda: T.f32 | ||
| i8_type = lambda: T.i8 |
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Comment on lines
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| a_dtype_str = "fp8" | ||
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@lalala-sh ck ? or flydsl? |
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Motivation
Enable the FlyDSL backend for a8w8 FP8 blockscale (
per_1x128/per_128x128) MoE infused_moe, and provide the FlyDSL stage1/2 blockscale kernels + tuner integration + tuned configs for the four dsv3 v3 shapes ((model_dim=7168, inter_dim={256,512})×(E,topk)={(256,8), (257,9)}).For small-token decode (M ≤ 4) the FlyDSL 2-stage path now consistently beats the ASM 1-stage blockscale kernel on gfx950 (e.g. M=1: 23.6 us vs 26.6 us, ~13% faster); for medium / large M the tuner still picks the ASM 1-stage where it is faster, so the change is strictly opt-in via the tuned CSV.
Technical Details
Test Plan
Test Result
Submission Checklist