FIIXED

Author: PythonPlumber

build.ps1

@@ -0,0 +1,24 @@
+#ifndef ARCH_X86_CPU_H
+#define ARCH_X86_CPU_H
+
+#include "types.h"
+
+struct registers {
+    uint32_t gs, fs, es, ds;
+    uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
+    uint32_t int_no, err_code;
+    uint32_t eip, cs, eflags, useresp, ss;
+};
+
+#define LAPIC_BASE 0xFEE00000
+#define LAPIC_ID   0x0020
+#define LAPIC_EOI  0x00B0
+#define LAPIC_SVR  0x00F0
+#define LAPIC_ICR_LOW  0x0300
+#define LAPIC_ICR_HIGH 0x0310
+#define LAPIC_LVT_TMR  0x0320
+#define LAPIC_TMRINIT  0x0380
+#define LAPIC_TMRCURR  0x0390
+#define LAPIC_TMRDIV   0x03E0
+
+#endif

include/arch/x86/cpu.h

@@ -2,6 +2,7 @@
 #define IDT_H
 
 #include "types.h"
+#include "cpu.h"
 
 typedef struct {
     uint16_t offset_low;
@@ -16,17 +17,11 @@ typedef struct {
     uint32_t base;
 } __attribute__((packed)) idt_ptr_t;
 
-typedef struct {
-    uint32_t gs, fs, es, ds;
-    uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax;
-    uint32_t int_no, err_code;
-    uint32_t eip, cs, eflags, useresp, ss;
-} registers_t;
-
 typedef registers_t* (*isr_t)(registers_t* regs);
 
 void idt_set_gate(uint8_t num, uint32_t base, uint16_t selector, uint8_t type, uint8_t dpl, uint8_t present);
 void idt_init(void);
+void idt_load_current(void);
 void idt_load(uint32_t idt_ptr_addr);
 void register_interrupt_handler(uint8_t n, isr_t handler);
 void isr_init(void);

include/gdt.h include/arch/x86/gdt.hinclude/gdt.h renamed to include/arch/x86/gdt.h

@@ -0,0 +1,16 @@
+#ifndef INTERRUPTS_H
+#define INTERRUPTS_H
+
+#include "types.h"
+#include "cpu.h"
+
+#if defined(__i386__)
+#include "arch/x86/cpu.h"
+#endif
+
+typedef registers_t* (*isr_t)(registers_t* regs);
+
+void register_interrupt_handler(uint8_t n, isr_t handler);
+void idt_init(void);
+
+#endif

include/idt.h include/arch/x86/idt.hinclude/idt.h renamed to include/arch/x86/idt.h

@@ -0,0 +1,26 @@
+#ifndef SMP_RALLY_H
+#define SMP_RALLY_H
+
+#include "types.h"
+
+#define LAPIC_BASE      0xFEE00000
+#define LAPIC_ID        0x0020
+#define LAPIC_VER       0x0030
+#define LAPIC_TPR       0x0080
+#define LAPIC_EOI       0x00B0
+#define LAPIC_SVR       0x00F0
+#define LAPIC_ICR_LOW   0x0300
+#define LAPIC_ICR_HIGH  0x0310
+#define LAPIC_LVT_TMR   0x0320
+#define LAPIC_TMRINIT   0x0380
+#define LAPIC_TMRCURR   0x0390
+#define LAPIC_TMRDIV    0x03E0
+
+void smp_rally_init(void);
+uint32_t smp_rally_cpu_count(void);
+int smp_rally_boot(uint32_t cpu_id);
+uint32_t smp_rally_online_mask(void);
+int smp_rally_add_cpu(uint32_t cpu_id);
+int smp_rally_remove_cpu(uint32_t cpu_id);
+
+#endif

include/arch/x86/interrupts.h

@@ -0,0 +1,59 @@
+#ifndef CPU_H
+#define CPU_H
+
+#include "types.h"
+#include "arch/x86/cpu.h"
+
+// Generic register state structure
+// This will be defined by each architecture
+typedef struct registers registers_t;
+
+// CPU features
+int cpu_has_feature(uint32_t feature);
+#define CPU_FEATURE_SSE   1
+#define CPU_FEATURE_SSE41 2
+#define CPU_FEATURE_FPU   3
+
+// Feature enablement
+void cpu_enable_feature(uint32_t feature);
+
+// CPU information
+void cpu_get_vendor(char* out, uint32_t max);
+
+// System control
+void cpu_reboot(void);
+
+// Architecture-specific initialization
+void arch_init(void);
+
+// Interrupt control
+void interrupts_enable(void);
+void interrupts_disable(void);
+int interrupts_enabled(void);
+
+// CPU identification
+uint32_t cpu_get_id(void);
+uint32_t cpu_get_count(void);
+
+#include "mmu.h"
+
+// TLB management
+static inline void tlb_flush(uintptr_t addr) { mmu_tlb_flush(addr); }
+static inline void tlb_flush_all(void) { mmu_tlb_flush_all(); }
+
+// Paging control
+static inline void paging_switch_directory(uintptr_t dir_phys) { mmu_switch_space(dir_phys); }
+
+// Halt the CPU
+void cpu_halt(void);
+void cpu_pause(void);
+
+// Port I/O (x86 specific, but can be stubs elsewhere)
+uint8_t inb(uint16_t port);
+void outb(uint16_t port, uint8_t val);
+uint16_t inw(uint16_t port);
+void outw(uint16_t port, uint16_t val);
+uint32_t inl(uint16_t port);
+void outl(uint16_t port, uint32_t val);
+
+#endif

include/multiboot.h include/arch/x86/multiboot.hinclude/multiboot.h renamed to include/arch/x86/multiboot.h

@@ -4,11 +4,11 @@
 #include "types.h"
 
 void heap_init(void);
-void* kmalloc(uint32_t size);
+void* kmalloc(size_t size);
 void kfree(void* ptr);
-uint32_t heap_total_bytes(void);
-uint32_t heap_free_bytes(void);
-void* aligned_alloc(uint32_t size, uint32_t align);
-void kheap_stats(uint32_t* total_bytes, uint32_t* free_bytes);
+size_t heap_total_bytes(void);
+size_t heap_free_bytes(void);
+void* aligned_alloc(size_t size, size_t align);
+void kheap_stats(size_t* total_bytes, size_t* free_bytes);
 
 #endif