tlcs870c/ins.cpp at master · CodeKill3r/tlcs870c · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
/*
 *      TLCS900 processor module for IDA.
 *      Copyright (c) 2016 Máté Sebõk < smfinc.org{at}gmail.com >
 *      Freeware.
 */

#include "tosh.hpp"

// Attention!!! command option to work with words
// Should go after _strogo_ byte version -
// Used to simplify analysis in ana.c

instruc_t Instructions[] = {
{ "",           0                               },      // Unknown Operation
{ "LD",         CF_USE1|CF_CHG1|CF_USE2         },      // Load  data
{ "LDW",        CF_USE1|CF_CHG1|CF_USE2         },      // Load  data
{ "PUSH",       CF_USE1                         },      // Push data
{ "POP",        CF_USE1|CF_CHG1                 },      // pop data
{ "XCH",        CF_USE1|CF_CHG1|CF_USE2|CF_CHG2 },      // xchg

{ "CMP",        CF_USE1|CF_USE2                 },      // cmp
{ "ADD",        CF_USE1|CF_CHG1|CF_USE2         },
{ "ADDC",       CF_USE1|CF_CHG1|CF_USE2         },      // add /w carry
{ "SUB",        CF_USE1|CF_CHG1|CF_USE2         },
{ "SUBB",       CF_USE1|CF_CHG1|CF_USE2         },      // sub /w carry
{ "AND",        CF_USE1|CF_CHG1|CF_USE2         },
{ "OR",         CF_USE1|CF_CHG1|CF_USE2         },
{ "XOR",        CF_USE1|CF_CHG1|CF_USE2         },
{ "INC",        CF_USE1|CF_CHG1                 },
{ "DEC",        CF_USE1|CF_CHG1                 },
{ "DAA",        CF_USE1|CF_CHG1                 },      //converts BCD sum after (binary)ADD/ADDC to BCD
{ "DAS",        CF_USE1|CF_CHG1                 },      //converts BCD result after (binary)SUB/SUBB to BCD
{ "MUL",        CF_USE1|CF_USE2|CF_CHG1|CF_CHG2 },
{ "DIV",        CF_USE1|CF_USE2|CF_CHG1         },
{ "NEG",        CF_USE1|CF_CHG1                 },

{ "SHLC",       CF_USE1|CF_CHG1                 },
{ "SHRC",       CF_USE1|CF_CHG1                 },
{ "ROLC",       CF_USE1|CF_CHG1                 },
{ "RORC",       CF_USE1|CF_CHG1                 },
{ "SHLCA",      CF_USE1|CF_CHG1                 },
{ "SHRCA",      CF_USE1|CF_CHG1                 },
{ "SWAP",       CF_USE1|CF_CHG1                 },
{ "ROLD",       CF_USE1|CF_USE2|CF_CHG1|CF_CHG2 },
{ "RORD",       CF_USE1|CF_USE2|CF_CHG1|CF_CHG2 },

{ "SET",        CF_USE1|CF_CHG1                 },
{ "CLR",        CF_USE1|CF_CHG1                 },
{ "TEST",       CF_USE1|CF_USE2                 },      // to JS & ~CF
{ "CPL",        CF_USE1|CF_CHG1                 },      // negate bit
{ "EI",         0                               },
{ "DI",         0                               },

{ "JRS",        CF_USE1|CF_USE2|CF_JUMP         },      // always conditional
{ "JR",         CF_USE1|        CF_JUMP|CF_STOP },
{ "JR",         CF_USE1|CF_USE2|CF_JUMP         },
{ "JP",         CF_USE1|        CF_JUMP|CF_STOP },

{ "CALLV",      CF_USE1|CF_CALL                 },
{ "CALL",       CF_USE1|CF_CALL                 },
{ "RET",        CF_STOP                         },
{ "RETI",       CF_STOP                         },
{ "RETN",       CF_STOP                         },

{ "SWI",        CF_STOP                         },
{ "NOP",        0                               }
};

CASSERT(qnumber(Instructions) == T870C_last);