Skip to content

fix: resolve debugger issues with simulator endianness, FBD visualization, and forced variable polling#635

Merged
thiagoralves merged 1 commit into
developmentfrom
fix/debugger-simulator-and-fbd-issues
Feb 27, 2026
Merged

fix: resolve debugger issues with simulator endianness, FBD visualization, and forced variable polling#635
thiagoralves merged 1 commit into
developmentfrom
fix/debugger-simulator-and-fbd-issues

Conversation

@thiagoralves
Copy link
Copy Markdown
Contributor

@thiagoralves thiagoralves commented Feb 27, 2026

Summary

  • Simulator endianness detection: The simulator debug flow skipped the getMd5Hash() call that triggers set_endianness() on the emulated AVR runtime. This caused multi-byte forced values to be byte-swapped on the little-endian AVR emulator (e.g., forcing INT to 1 displayed as 256). Now getMd5Hash() is called after connecting in the simulator path of handleDebuggerConnect.

  • FBD BOOL edge coloring: Compiler-generated _TMP_ function output variables (e.g., _TMP_GT3058168_OUT) were only registered in the debug variable info map for Ladder flows, not FBD. This meant function BOOL outputs were never polled and FBD edges were never painted green. Extracted a shared registerFunctionTempOutputs helper used by both LD and FBD. Also added the missing getCompositeKey dependency to the FBD styledEdges useMemo (Ladder already had it).

  • Forced variable polling: Variables forced from the diagram (FBD or Ladder) were added to debugForcedVariables but never included in the debugVariableKeys polling set. Their values never appeared in the debugger panel (showed "-" or stale data). Now all forced variable composite keys are added to debugVariableKeys before building the poll list.

Test plan

  • Open a program with an FBD GT block connected to BOOL variables, run the simulator debugger, force IN1 > IN2, and verify the OUT edge turns green
  • Force an INT variable to value 1 in the simulator and verify it displays as 1 (not 256)
  • Force a variable from the FBD/LD diagram without first adding it to the debugger panel via the debug icon, and verify its value appears in the panel
  • Verify Ladder debug visualization still works correctly (no regressions)
  • Test on real hardware to confirm no regressions in the non-simulator debug flow

🤖 Generated with Claude Code

Summary by CodeRabbit

Release Notes

  • New Features

    • Expanded debugging workspace to support Function Block Diagram (FBD) flows alongside Ladder Logic.
    • Enhanced automatic polling and monitoring of function block outputs and temporary variables for improved debugging visibility.
  • Bug Fixes

    • Improved endianness detection when connecting to emulated environments for accurate multi-byte value handling.

1. Simulator endianness: the simulator debug flow skipped the
   getMd5Hash() call that triggers set_endianness() on the AVR runtime,
   causing multi-byte forced values to be byte-swapped (e.g. 1 → 256).

2. FBD BOOL edge coloring: _TMP_ function output variables were only
   registered for Ladder flows but not FBD, so function outputs like
   GT.OUT never got polled and edges were never painted green. Extracted
   a shared registerFunctionTempOutputs helper used by both editors.
   Also added missing getCompositeKey to the FBD styledEdges memo deps.

3. Forced variable polling: variables forced from the diagram were added
   to debugForcedVariables but never to the polling key set, so their
   values never appeared in the debugger panel. Now forced variable keys
   are included in debugVariableKeys before building the poll list.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
@coderabbitai
Copy link
Copy Markdown
Contributor

coderabbitai Bot commented Feb 27, 2026

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info

Configuration used: Repository UI

Review profile: CHILL

Plan: Pro

Disabled knowledge base sources:

  • Linear integration is disabled

You can enable these sources in your CodeRabbit configuration.

📥 Commits

Reviewing files that changed from the base of the PR and between 26b402d and 11d5fe9.

📒 Files selected for processing (3)
  • src/main/modules/ipc/main.ts
  • src/renderer/components/_molecules/graphical-editor/fbd/index.tsx
  • src/renderer/screens/workspace-screen.tsx

Walkthrough

This PR adds endianness detection for simulator connections via Modbus, fixes FBD editor memoization by including getCompositeKey in dependency array, and extends debugger variable polling to support FBD POUs alongside LD with forced variable integration.

Changes

Cohort / File(s) Summary
Simulator Endianness Detection
src/main/modules/ipc/main.ts
Calls getMd5Hash on Modbus client after establishing simulator connection to trigger runtime endianness detection and byte-order configuration.
FBD Editor Memoization
src/renderer/components/_molecules/graphical-editor/fbd/index.tsx
Adds getCompositeKey to the dependency array of FBDBody's styledEdges useMemo to ensure recomputation when the function changes.
Debugger Variable Polling Expansion
src/renderer/screens/workspace-screen.tsx
Adds FBD flow retrieval and processing alongside LD flows; introduces registerFunctionTempOutputs helper to centralize function-block output polling; extends polling to include FBD-specific variable nodes, automatic ENO polling for enabled execution control, and forced variable inclusion via composite-key mapping.

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

Possibly related PRs

Suggested labels

bug

Suggested reviewers

  • vmleroy
  • JoaoGSP
  • JulioSergioFS

Poem

🐰 A byte-swapping hop, endianness in sight,
FBD flows now polled with composite might,
Forced variables dance in the debugger's care,
Memoized deps aligned everywhere!

🚥 Pre-merge checks | ✅ 2 | ❌ 1

❌ Failed checks (1 inconclusive)

Check name Status Explanation Resolution
Description check ❓ Inconclusive The description provides a comprehensive summary of changes and a test plan, but lacks required sections like issue references, DOD checklist completion, and test coverage metrics. Add issue/Jira references, fill out the DOD checklist with checkmarks, and specify test coverage percentage to meet template requirements.
✅ Passed checks (2 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly summarizes the three main fixes: simulator endianness, FBD visualization, and forced variable polling.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

✏️ Tip: You can configure your own custom pre-merge checks in the settings.

✨ Finishing Touches
  • 📝 Generate docstrings (stacked PR)
  • 📝 Generate docstrings (commit on current branch)
🧪 Generate unit tests (beta)
  • Create PR with unit tests
  • Post copyable unit tests in a comment
  • Commit unit tests in branch fix/debugger-simulator-and-fbd-issues

Thanks for using CodeRabbit! It's free for OSS, and your support helps us grow. If you like it, consider giving us a shout-out.

❤️ Share

Comment @coderabbitai help to get the list of available commands and usage tips.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant